Document
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Rev. 4 — 10 February 2016
Product data sheet
1. General description
The 74HC4060; 74HCT4060 is a 14-stage ripple-carry counter/divider and oscillator with three oscillator terminals (RS, RTC and CTC), ten buffered parallel outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. In this case, keep the oscillator pins (RTC and CTC) floating. The counter advances on the HIGH-to-LOW transition of RS. A HIGH level on MR clears all counter stages and forces all outputs LOW, independent of the other input conditions. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
All active components on chip RC or crystal oscillator configuration Complies with JEDEC standard no. 7 A Input levels:
For 74HC4060: CMOS level For 74HCT4060: TTL level ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C
3. Applications
Control counters Timers Frequency dividers Time-delay circuits
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
4. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74HC4060D 74HCT4060D
40 C to +125 C SO16
plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
74HC4060DB 74HCT4060DB
40 C to +125 C SSOP16
plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
74HC4060PW
40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; SOT403-1 body width 4.4 mm
74HC4060BQ 74HCT4060BQ
40 C to +125 C
DHVQFN16 plastic dual in-line compatible thermal-enhanced SOT763-1 very thin quad flat package; no leads; 16 terminals; body 2.5 3.5 0.85 mm
5. Functional diagram
Fig 1. Logic symbol
56 05
57& &7&
4 4 4 4 4 4 4 4 4 4
DDL
Fig 2. IEC logic symbol
74HC_HCT4060
Product data sheet
&75
* &7&
57&
56
05 &7
&7
D
&75
$1' &7
&7
E DDL
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 10 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
2 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
56 05
Fig 3. Functional diagram
57&
&7&
&3 67$*(%,1$5<&2817(5 05
4 4 4 4 4 4 4 4 4 4
DDL
&7&
57& 56
))
&3
4 05
))
&3
4 05
))
&3
4 05
))
&3
4 05
))
&3
4 05
05
Fig 4. Logic diagram
4 4 4 4
DDL
74HC_HCT4060
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 10 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
3 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
6. Pinning information
6.1 Pinning
+& +&7
4 4 4
4 4 4 4 *1'
9&& 4 4 4 05 56 57& &7&
DDL
Fig 5. Pin configuration SO16 and (T)SSOP16
WHUPLQDO LQGH[DUHD
+& +&7
4 9&&
4 4
4 4 4 4
9&&
4 4 4 05 56 57&
*1' &7&
DDL
7UDQVSDUHQWWRSYLHZ
(1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to VCC.
Fig 6. Pin configuration DHVQFN16
6.2 Pin description
Table 2. Pin description Symbol Q11 to Q13 Q3 to Q9 GND CTC RTC RS MR VCC
Pin 1, 2, 3 7, 5, 4, 6, 14, 13, 15 8 9 10 11 12 16
Description counter output counter output ground (0 V) external capacitor connection external resistor connection clock input /oscillator pin master reset input (active HIGH) supply voltage
74HC_HCT4060
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 10 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
4 of 25
NXP Semiconductors
7. Functional description
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
56
05
4
4
4
4
4
4
4
4
4
4
Fig 7. Timing diagram
DDL
8. Limiting values
Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Co.