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SP5610

Zarlink Semiconductor

1.3GHz BI-DIRECTIONAL I2C BUS CONTROLLED SYNTHESISER

FEBRUARY 1997 ADVANCE INFORMATION D.S. 3920 3.3 SP5610 1.3GHz BI–DIRECTIONAL I2C BUS CONTROLLED SYNTHESISER (Supersedes ...


Zarlink Semiconductor

SP5610

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Description
FEBRUARY 1997 ADVANCE INFORMATION D.S. 3920 3.3 SP5610 1.3GHz BI–DIRECTIONAL I2C BUS CONTROLLED SYNTHESISER (Supersedes edition in 1996 Media IC Handbook, HB4599–1.0) The SP5610 is a single chip frequency synthesiser designed for TV tuning systems. Control data is entered in the standard I2C BUS format. The device contains 1 addressable current limited output and 4 addressable bi–directional open collector ports one of which is a 3 bit ADC. The information on these ports can be read via the I2C BUS. The device has one fixed I2C BUS address and 3 programmable addresses, programmed by applying a specific input voltage to the P3 current limited output. This enables 2 or more synthesisers to be used in a system. FEATURES J Complete 1.3GHz Single chip System J High Sensitivity RF Inputs J Programmable via I2C Bus J On Chip oscillator with 1kW negative resistance J Low power consumption (5V, 20mA) J Low Radiation J Phase Lock Detector J Varactor Drive Amp Disable J 5 Controllable Outputs J 5 Level ADC J Variable I2C BUS Address For Multi Tuner Applications J ESD Protection * J Switchable 512/1024 Reference Divider J Pin and Function Compatible with SP5510S [ * Normal ESD handling procedures should be observed. [ The SP5510S does not have a switchable reference division ratio. APPLICATIONS J Satellite TV when combined with SP4902 2.5GHz prescaler J Cable Tuning Systems J VCR’s CHARGE PUMP CRYSTAL Q1 CRYSTAL Q2 SDA SCL [ I/O PORT P7 * I/O PORT P6 [ I/O PORT P5 SP5610S 1 16 2 15 ...




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