Document
MCP37220-200 MCP37D20-200
200 Msps, 14-Bit Low-Power Single-Channel ADC
Features
• Sample Rates: 200 Msps • Signal-to-Noise Ratio (SNR) with fIN = 15 MHz
and -1 dBFS: - 67.8 dBFS (typical) at 200 Msps • Spurious-Free Dynamic Range (SFDR) with fIN = 15 MHz and -1 dBFS: - 96 dBc (typical) at 200 Msps • Power Dissipation with LVDS Digital I/O: - 348 mW at 200 Msps • Power Dissipation with CMOS Digital I/O: - 306 mW at 200 Msps, output clock = 100 MHz • Power Dissipation Excluding Digital I/O: - 257 mW at 200 Msps • Power-Saving Modes: - 80 mW during Standby - 33 mW during Shutdown • Supply Voltage: - Digital Section: 1.2V, 1.8V - Analog Section: 1.2V, 1.8V • Selectable Full-Scale Input Range: up to 1.8 VP-P • Analog Input Bandwidth: 650 MHz • Output Interface: - Parallel CMOS, DDR LVDS • Output Data Format: - Two's complement or offset binary • Optional Output Data Randomizer
• Digital Signal Post-Processing (DSPP) Options: - Decimation filters for improved SNR - Offset and Gain adjustment - Digital Down-Conversion (DDC) with I/Q or fS/8 output (MCP37D20-200)
• Built-In ADC Linearity Calibration Algorithms: - Harmonic Distortion Correction (HDC) - DAC Noise Cancellation (DNC) - Dynamic Element Matching (DEM) - Flash Error Calibration
• Serial Peripheral Interface (SPI) • Package Options:
- VTLA-124 (9 mm x 9 mm x 0.9 mm) - TFBGA-121 (8 mm x 8 mm x 1.08 mm) • No external reference decoupling capacitor required for TFBGA Package • Industrial Temperature Range: -40°C to +85°C
Typical Applications
• Communication Instruments • Microwave Digital Radio • Cellular Base Stations • Radar • Scanners and Low-Power Portable Instruments • Industrial and Consumer Data Acquisition System
Device Offering(1)
Part Number
Sample Rate
Resolution
Digital Decimation (FIR Filters)
Digital Down-Conversion
Noise-Shaping Requantizer
MCP37220-200
200 Msps
14
Yes
No
No
MCP37D20-200
200 Msps
14
Yes
Yes
No
MCP37210-200
200 Msps
12
Yes
No Yes
MCP37D10-200
200 Msps
12
Yes
Yes Yes
1: For TFBGA package, contact Microchip Technology Inc. for availability. Devices in the same package type are pin-compatible.
2015 Microchip Technology Inc.
DS20005396A-page 1
MCP37220-200 AND MCP37D20-200
Functional Block Diagram AVDD12
AVDD18
GND
DVDD12
DVDD18
CLK+ CLK-
Clock Selection
Duty Cycle Correction
DLL PLL
AIN+ AIN-
VCM SENSE
VBG
Output Clock Control
Pipelined ADC
Digital Signal Post-Processing:
- Decimation - Offset/Gain Adjustment
MCP37D20-200: - Digital Down-Conversion
VREF+
VREF-
Reference Generator
Output Control: - CMOS - DDR LVDS
Internal Registers
DCLK+ DCLK-
OVR WCK Q[13:0]
REF+ REF-
SDIO SCLK CS
DS20005396A-page 2
2015 Microchip Technology Inc.
MCP37220-200 AND MCP37D20-200
Description
The MCP37220-200 is a single-channel 200 Msps 14-bit pipelined ADC, with built-in high-order digital decimation filters, gain and offset adjustment.
The MCP37D20-200 is also a single-channel 200 Msps 14-bit pipelined ADC, with built-in digi.