30 P-Channel Enhancement-Mode MOSFET
VDS= -30V RDS(ON), Vgs@-10V,
[email protected] = 21m RDS(ON),
[email protected],
[email protected] = 35m
Advanced trench process technology High Density Cell Design For Ultra Low On-Resistance
AP4435
Preliminary Data Sheet
S0-8
Internal Schematic Diagram Drain
Gate
Top View
Source P-Channel MOSFET
Maximum Ratings and Thermal Characteristics (TA = 25 oC unless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage Continuous Drain Current
VGS ID
Limit -30
±20 -7
Pulsed Drain Current 1) Maximum Power Dissipation
TA = 25oC TA = 75oC
IDM PD
-50 1.5 0.9
Operating Junction and Storage Temperature Range Junction-to-Ambient Thermal Resistance (PCB mounted) 2)
Note: 1. Repetitive Rating: Pulse width limited by the maximum junction temperature
2. 1-in2
2oz Cu PCB board
3. Guaranteed by design; not subject to production testing
TJ, Tstg R JA
-55 to 150 85
Unit V
A
W
oC oC/W
July '06 Rev 1
ELECTRICAL CHARACTERISTICS
Parameter Static Drain-Source Breakdown Voltage Drain-Source On-State Resistance Drain-Source On-State Resistance Gate Threshold Voltage Zero Gate Voltage Drain Current Gate Body Leakage Forward Transconductance Dynamic Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time
Turn-On Rise Time
Symbol
BVDSS RDS(on) RDS(on) VGS(th)
IDSS IGSS gfs
Qg Qgs Qgd td(on) tr
Turn-Off Delay Time Turn-Off Fall Time Input Capacitance
Output Capacitance
Reverse Transfer Capacitance Source-Drain Diode
td(off) tf Ciss Coss Crss
Max. Diode Forward Current Diode Forward Voltage
IS VSD
Note: Pulse test: pulse width <= 300us, duty cycle<= 2%
AP4435
Preliminary Data Sheet P-Channel Enhancement-Mode MOSFET
Test Condition
VGS = 0V, ID = -250uA VGS = -10V, ID = -9.1A VGS = -4.5V, ID = -6.9A VDS =VGS, ID = -250uA VDS = -30V, VGS = 0V VGS = ± 20V, VDS = 0V VDS = -10V, ID = -9.1A
VDS = 20V, ID = 5.7A VGS = 10V
VDD = 20V, RL=20 ID = 1A, VGEN = 10V
RG = 6
VDS = 8V, VGS = 0V f = 1.0 MHz
IS = 1.8A, VGS = 0V
Min Typ Max Unit
-30 V
17.0 21.0 23.0 35.0
m
-1 -3 V
-1 uA
±100
nA
24 S
nC
ns
pF
A V
July '06ev
Disclaimer Notice
Notice
Specification of the products displayed herein are subject to change without notice. Continuous development may necessitate changes in technical data without notice. GMOS Semiconductor Sdn. Bhd. or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
July '06 Rev 1
3
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