SHARC Processor. ADSP-21488 Datasheet


ADSP-21488 Processor. Datasheet pdf. Equivalent


ADSP-21488


SHARC Processor
SHARC Processor ADSP-21483/ADSP-21486/ADSP-21487/ADSP-21488/ADSP-21489

FEATURES
High performance 32-bit/40-bit floating-point processor optimized for high performance audio processing
Single-instruction, multiple-data (SIMD) computational architecture
On-chip memory—5 Mbits on-chip RAM, 4 Mbits on-chip ROM
Up to 450 MHz operating frequency Code compatible with all other members of the SHARC family

The ADSP-2148x processors are available with unique audiocentric peripherals, such as the digital applications interface, serial ports, precision clock generators, S/PDIF transceiver, asynchronous sample rate converters, input data port, and more
For complete ordering information, see Ordering Guide on Page 70
AEC-Q100 qualified for automotive applications

SIMD Core

Instruction Cache

5 Stage Sequencer

DAG1/2

Core Timer

PEx PEy

FLAGx/IRQx/ TMREXP

JTAG THERMAL DIODE

Internal Memory

Block 0 RAM/ROM

Block 1 RAM/ROM

Block 2 RAM

S

DMD 64-BIT

DMD 64-BIT

Core Bus

PMD 64-BIT

Cross Bar

PMD 64-BIT

EPD BUS 64-BIT

PERIPHERAL BUS 32-BIT

B0D 64-BIT

B1D 64-BIT

B2D 64-BIT

Internal Memory I/F
IOD0 32-BIT

Block 3 RAM
B3D 64-BIT
IOD1 32-BIT

PERIPHERAL BUS

CORE FLAGS/ PWM3-1

PCG C-D

TIMER 1-0

TWI

SPI/B UART

IOD0 BUS

S/PDIF PCG Tx/Rx A-D

ASRC PDAP/ SPORT 3-0 IDP 7-0 7-0

FFT FIR DTCP/ IIR MTM
SPEP BUS CORE PWM
WDT FLAGS 3-0

EP

AMI

SDRAM CTL

DPI Routing/Pins
DPI Peri...



ADSP-21488
SHARC Processor
ADSP-21483/ADSP-21486/ADSP-21487/ADSP-21488/ADSP-21489
FEATURES
High performance 32-bit/40-bit floating-point processor
optimized for high performance audio processing
Single-instruction, multiple-data (SIMD) computational
architecture
On-chip memory—5 Mbits on-chip RAM, 4 Mbits on-chip
ROM
Up to 450 MHz operating frequency
Code compatible with all other members of the SHARC family
The ADSP-2148x processors are available with unique audio-
centric peripherals, such as the digital applications
interface, serial ports, precision clock generators, S/PDIF
transceiver, asynchronous sample rate converters, input
data port, and more
For complete ordering information, see Ordering Guide on
Page 70
AEC-Q100 qualified for automotive applications
SIMD Core
Instruction
Cache
5 Stage
Sequencer
DAG1/2
Core
Timer
PEx PEy
FLAGx/IRQx/
TMREXP
JTAG THERMAL
DIODE
Internal Memory
Block 0
RAM/ROM
Block 1
RAM/ROM
Block 2
RAM
S
DMD
64-BIT
DMD
64-BIT
Core Bus
PMD
64-BIT
Cross Bar
PMD 64-BIT
EPD BUS 64-BIT
PERIPHERAL BUS
32-BIT
B0D
64-BIT
B1D
64-BIT
B2D
64-BIT
Internal Memory I/F
IOD0 32-BIT
Block 3
RAM
B3D
64-BIT
IOD1
32-BIT
PERIPHERAL BUS
CORE
FLAGS/
PWM3-1
PCG
C-D
TIMER
1-0
TWI
SPI/B UART
IOD0 BUS
S/PDIF PCG
Tx/Rx A-D
ASRC PDAP/ SPORT
3-0 IDP 7-0
7-0
FFT
FIR DTCP/
IIR MTM
SPEP BUS
CORE PWM
WDT FLAGS 3-0
EP
AMI
SDRAM
CTL
DPI Routing/Pins
DPI Peripherals
DAI Routing/Pins
DAI Peripherals
Figure 1. Functional Block Diagram
External Port Pin MUX
Peripherals
External
Port
SHARC and the SHARC logo are registered trademarks of Analog Devices, Inc.
Rev. H
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However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
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Tel: 781.329.4700
©2020 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

ADSP-21488
ADSP-21483/ADSP-21486/ADSP-21487/ADSP-21488/ADSP-21489
TABLE OF CONTENTS
Features ................................................................. 1
Table of Contents ..................................................... 2
Revision History ...................................................... 2
General Description ................................................. 3
Family Core Architecture ........................................ 4
Family Peripheral Architecture ................................ 7
I/O Processor Features ......................................... 10
System Design .................................................... 11
Development Tools ............................................. 12
Additional Information ........................................ 13
Related Signal Chains .......................................... 13
Pin Function Descriptions ....................................... 14
Specifications ........................................................ 18
Operating Conditions .......................................... 18
Electrical Characteristics ....................................... 19
Absolute Maximum Ratings .................................. 21
ESD Sensitivity ................................................... 21
Maximum Power Dissipation ................................. 21
Timing Specifications ........................................... 22
Output Drive Currents ......................................... 55
Test Conditions .................................................. 55
Capacitive Loading .............................................. 55
Thermal Characteristics ........................................ 56
88-Lead LFCSP_VQ Lead Assignment ......................... 58
100-Lead LQFP_EP Lead Assignment ......................... 60
176-Lead LQFP_EP Lead Assignment ......................... 62
Outline Dimensions ................................................ 66
Surface-Mount Design .......................................... 68
Automotive Products .............................................. 69
Ordering Guide ..................................................... 70
REVISION HISTORY
2/2020—Rev. G to Rev. H
Changes to Pin List, Power, Ground and Other .............. 17
Changes to Operating Conditions ............................... 18
Changes to Electrical Characteristics ............................ 19
Changes to Thermal Characteristics ............................ 56
Changes to 88-Lead LFCSP_VQ Lead Assignment .......... 58
Changes to 100-Lead LQFP_EP Lead Assignment ........... 60
Changes to 176-Lead LQFP_EP Lead Assignment ........... 62
Changes to Automotive Products ................................ 69
Changes to Ordering Guide ....................................... 70
Rev. H | Page 2 of 71 | February 2020




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