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IR21084SPBF Dataheets PDF



Part Number IR21084SPBF
Manufacturers International Rectifier
Logo International Rectifier
Description HALF-BRIDGE DRIVER
Datasheet IR21084SPBF DatasheetIR21084SPBF Datasheet (PDF)

www.DataSheet4U.com Data Sheet No. PD60161-R IR2108(4) (S) & (PbF) Features HALF-BRIDGE DRIVER • Floating channel designed for bootstrap operation Fully operational to +600V Tolerant to negative transient voltage Packages dV/dt immune 8-Lead SOIC 14-Lead SOIC • Gate drive supply range from 10 to 20V IR2108S IR21084S • Undervoltage lockout for both channels • 3.3V, 5V and 15V input logic compatible • Cross-conduction prevention logic • Matched propagation delay for both channels 14.

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www.DataSheet4U.com Data Sheet No. PD60161-R IR2108(4) (S) & (PbF) Features HALF-BRIDGE DRIVER • Floating channel designed for bootstrap operation Fully operational to +600V Tolerant to negative transient voltage Packages dV/dt immune 8-Lead SOIC 14-Lead SOIC • Gate drive supply range from 10 to 20V IR2108S IR21084S • Undervoltage lockout for both channels • 3.3V, 5V and 15V input logic compatible • Cross-conduction prevention logic • Matched propagation delay for both channels 14-Lead PDIP IR21084 • High side output in phase with HIN input 8-Lead PDIP • Low side output out of phase with LIN input IR2108 • Logic and power ground +/- 5V offset. • Internal 540ns dead-time, and programmable up to 5us with one 2106/2301//2108//2109/2302/2304 Feature Comparison external RDT resistor (IR21084) • Lower di/dt gate driver for better noise immunity • Available in Lead-Free Description The IR2108(4)(S) are high voltage, high speed power MOSFET and IGBT drivers with dependent high and low side referenced output channels. Proprietary HVIC and latch immune Part 2106/2301 21064 2108 21084 2109/2302 21094 2304 Input logic HIN/LIN HIN/LIN IN/SD HIN/LIN Crossconduction prevention logic no yes yes yes Dead-Time none Internal 540ns Programmable 0.54~5 µs Internal 540ns Programmable 0.54~5 µs Internal 100ns Ground Pins COM VSS/COM COM VSS/COM COM VSS/COM COM CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts. Typical Connection VCC VCC VB HIN HIN HO LIN LIN VS COM LO up to 600V TO LOAD IR2108 (Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. VCC HIN LIN V SS HO VCC VB HIN VS LIN DT RDT VSS COM LO IR21084 up to 600V TO LOAD www.irf.com 1 IR2108(4) (S) & (PbF) Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units VB VS VHO VCC VLO DT VIN VSS dVS/dt PD High side floating absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Programmable dead-time pin voltage (IR21084 only) Logic input voltage (HIN & LIN) Logic ground (IR21084 only) Allowable offset supply voltage transient Package power dissipation @ TA ≤ +25°C (8 lead PDIP) (8 lead SOIC) -0.3 VB - 25 VS - 0.3 -0.3 -0.3 VSS - 0.3 VSS - 0.3 VCC - 25 — — — 625 VB + 0.3 VB + 0.3 25 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 50 1.0 0.625 V V/ns (14 lead PDIP) (14 lead SOIC) — — 1.6 W 1.0 RthJA Thermal resistance, junction to ambient (8 lead PDIP) (8 lead SOIC) — — 125 200 (14 lead PDIP) (14 lead SOIC) — — 75 °C/W 120 TJ Junction temperature TS Storage temperature TL Lead temperature (soldering, 10 seconds) — 150 -50 150 °C — 300 Recommended Operating Conditions The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential. Symbol Definition Min. Max. Units VB High side floating supply absolute voltage VS + 10 VS + 20 VS High side floating supply offset voltage Note 1 600 VHO High side floating output voltage VS VB VCC Low side and logic fixed supply voltage 10 20 VLO Low side output voltage 0 VCC V VIN Logic input voltage IR2108 COM VCC IR21084 VSS VCC DT Programmable dead-time pin voltage (IR21084 only) VSS VCC VSS Logic ground (IR21084 only) TA Ambient temperature -5 5 -40 125 °C Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for more details). 2 www.irf.com IR2108(4) (S) & (PbF) Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25°C, DT = VSS unless otherwise specified. Symbol ton toff MT tr tf DT MDT Definition Turn-on propagation delay Turn-off propagation delay Delay matching | ton - toff | Turn-on rise time Turn-off fall time Deadtime: LO turn-off to HO turn-on(DTLO-HO) & HO turn-off to LO turn-on (DTHO-LO) | |Deadtime matching = DTLO-HO - DTHO-LO Min. — — — — — 400 4 — — Typ. 220 200 0 150 50 540 5 0 0 Max. Units Test Conditions 300 VS = 0V 280 VS = 0V or 600V 30 220 nsec VS = 0V 80 VS = 0V 680 RDT= 0 6 usec RDT.


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