Document
STM32F411xC STM32F411xE
Arm® Cortex®-M4 32b MCU+FPU, 125 DMIPS, 512KB Flash, 128KB RAM, USB OTG FS, 11 TIMs, 1 ADC, 13 comm. interfaces
Datasheet - production data
Features
• Includes ST state-of-the-art patented technology
• Dynamic efficiency line with BAM (Batch acquisition mode) – 1.7 V to 3.6 V power supply – - 40°C to 85/105/125 °C temperature range
• Core: Arm® 32-bit Cortex®-M4 CPU with FPU, adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from flash memory, frequency up to 100 MHz, memory protection unit, 125 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
• Memories – Up to 512 Kbytes of flash memory – 128 Kbytes of SRAM
• Clock, reset, and supply management – 1.7 V to 3.6 V application supply and I/Os – POR, PDR, PVD, and BOR – 4-to-26 MHz crystal oscillator – Internal 16 MHz factory-trimmed RC – 32 kHz oscillator for RTC with calibration – Internal 32 kHz RC with calibration
• Power consumption – Run: 100 µA/MHz (peripheral off) – Stop (Flash in Stop mode, fast wakeup time): 42 µA typical at 25 °C; 65 µA max at 25 °C – Stop (Flash in Deep power down mode, slow wakeup time): down to 9 µA at 25 °C; 28 µA max at 25 °C – Standby: 1.8 µA at 25 °C / 1.7 V without RTC; 11 µA at 85 °C at 1.7 V – VBAT supply for RTC: 1 µA at 25 °C
• 1×12-bit, 2.4 MSPS A/D converter: up to 16 channels
• General-purpose DMA: 16-stream DMA controllers with FIFOs and burst support
• Up to 11 timers: up to six 16-bit, two 32-bit timers up to 100 MHz, each with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input, two watchdog
UFBGA
WLCSP49 (2.999x3.185 mm)
LQFP100 (14 × 14 mm)
LQFP64 (10x10 mm)
UFQFPN48 (7 × 7 mm)
UFBGA100 (7 × 7 mm)
timers (independent and window) and a SysTick timer
• Debug mode – Serial wire debug (SWD) & JTAG interfaces – Cortex®-M4 Embedded Trace Macrocell™
• Up to 81 I/O ports with interrupt capability
– Up to 78 fast I/Os up to 100 MHz – Up to 77 5 V-tolerant I/Os
• Up to 13 communication interfaces – Up to 3 x I2C interfaces (SMBus/PMBus) – Up to 3 USARTs (2 x 12.5 Mbit/s, 1 x 6.25 Mbit/s), ISO 7816 interface, LIN, IrDA, modem control) – Up to 5 SPI/I2Ss (up to 50 Mbit/s, SPI, or Im2Suxaeuddfiuollp-droutpolceoxl)I,2SSPtoI2aacnhidevSePaI3udwioith class accuracy via internal audio PLL or external clock – SDIO interface (SD/MMC/eMMC) – Advanced connectivity: USB 2.0 full-speed device/host/OTG controller with on-chip PHY
• CRC calculation unit
• 96-bit unique ID
• RTC: subsecond accuracy, hardware calendar
• All packages are ECOPACK2 compliant
Table 1. Device summary
Reference
Part number
STM32F411xC STM32F411xE
STM32F411CC, STM32F411RC, STM32F411VC
STM32F411CE, STM32F411RE, STM32F411VE
January 2024
This is information on a product in full production.
DS10314 Rev 8
1/151
www.st.com
STM32F411xC STM32F411xE
Application
• Motor drive and application control • Medical equipment • Industrial applications: PLC, inverters, circuit breakers • Printers, and scanners • Alarm systems, video intercom, and HVAC • Home audio appliances • Mobile phone sensor hub
2/151
DS10314 Rev 8
STM32F411xC STM32F411xE
Contents
Contents
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.1 Compatibility with STM32F4 series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1 Arm® Cortex®-M4 with FPU core with embedded flash memory and SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.2 Adaptive real-time memory accelerator (ART Accelerator) . . . . . . . . . . . 17
3.3 Batch acquisition mode (BAM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4 Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5 Embedded flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.6 CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 18
3.7 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.8 Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.9 DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.10 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 20
3.11 External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.12 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .