DatasheetsPDF.com

74AUP1G32 Dataheets PDF



Part Number 74AUP1G32
Manufacturers Diodes
Logo Diodes
Description SINGLE 2 INPUT POSITIVE OR GATE
Datasheet 74AUP1G32 Datasheet74AUP1G32 Datasheet (PDF)

74AUP1G32 SINGLE 2 INPUT POSITIVE OR GATE Description The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP1G32 is a single, two-input, positive OR gate with a standard push-pull output designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing damaging current backflow when .

  74AUP1G32   74AUP1G32



Document
74AUP1G32 SINGLE 2 INPUT POSITIVE OR GATE Description The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP1G32 is a single, two-input, positive OR gate with a standard push-pull output designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing damaging current backflow when the device is powered down. The gate performs the positive Boolean function: Pin Assignments Y = A + B or Y = A • B Features • Advanced Ultra Low Power (AUP) CMOS • Supply Voltage Range from 0.8V to 3.6V • ±4mA Output Drive at 3.0V • Low Static Power Consumption Icc < 0.9µA • Low Dynamic Power Consumption CPD = 6.3pF (Typical at 3.6V) • Schmitt Trigger Action at all inputs makes the circuit tolerant for slower input rise and fall time. The hysteresis is typically 250mV at VCC = 3.0V. • IOFF Supports Partial-Power-Down Mode Operation • ESD Protection Exceeds JESD 22 2000-V Human Body Model (A114) Exceeds 1000-V Charged Device Model (C101) • Latch-Up Exceeds 100mA per JESD 78, Class I • Leadless Packages Named per JESD30E • Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) • Halogen and Antimony Free. “Green” Device (Note 3) 4Y 5 NC 6 Vcc Applications • Suited for Battery and Low Power Needs • Wide Array of Products Such As: Tablets, E-readers Cell Phones, Personal Navigation / GPS MP3 Players, Cameras, Video Recorders PCs, Ultrabooks, Notebooks, Netbooks Computer Peripherals, Hard Drives, SSDs, CD/DVD ROMs TVs, DVDs, DVRs, Set-Top Boxes Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. 74AUP1G32 Document number: DS35154 Rev. 4 - 2 1 of 16 www.diodes.com February 2015 © Diodes Incorporated Ordering Information 74AUP1G 32 XXX -7 74AUP1G32 Logic Device 74 : Logic Prefix AUP : 0.8 to 3.6V Logic Family 1G : One Gate Function 32 : 2-Input OR Gate Package SE : SOT353 FS3 : X2-DFN0808-4 FW5 : X1-DFN1010-6 FW4 : X2-DFN1010-6 FX4 : X2- DFN1409-6 FZ4 : X2- DFN1410-6 Packing -7 : 7” Tape & Reel Device 74AUP1G32SE-7 74AUP1G32FS3-7 74AUP1G32FW5-7 74AUP1G32FW4-7 74AUP1G32FX4-7 74AUP1G32FZ4-7 Package Code SE Package (Notes 4 & 5) SOT353 FS3 X2-DFN0808-4 FW5 X1-DFN1010-6 FW4 FX4 FZ4 X2-DFN1010-6 X2-DFN1409-6 Chip Scale Alternative X2-DFN1410-6 Package Size 2.0mm x 2.0mm x 1.1mm 0.65 mm lead pitch 0.8mm x 0.8mm x 0.35mm 0.5 mm pad pitch (diamond) 1.0mm x 1.0mm x 0.5mm 0.35 mm pad pitch 1.0mm x 1.0mm x 0.4mm 0.35 mm pad pitch 1.4mm x 0.9mm x 0.4mm 0.5 mm pad pitch 1.4mm x 1.0mm x 0.4mm 0.5 mm pad pitch 7” Tape and Reel Quantity Part Number Suffix 3,000/Tape & Reel -7 5,000/Tape & Reel -7 5,000/Tape & Reel -7 5,000/Tape & Reel -7 5,000/Tape & Reel -7 5,000/Tape & Reel -7 Notes: 4. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf. 5. The taping orientation is located on our website at http://www.diodes.com/datasheets/ap02007.pdf. Pin Descriptions Pin Name A B GND Y VCC Data Input Data Input Ground Data Output Supply Voltage Function Logic Diagram 1 A 2 B 4 Y Function Table Inputs AB LL LH HL HH Output Y L H H H 74AUP1G32 Document number: DS35154 Rev. 4 - 2 2 of 16 www.diodes.com February 2015 © Diodes Incorporated 74AUP1G32 Absolute Maximum Ratings (Notes 6 & 7) (@TA = +25°C, unless otherwise specified.) Symbol ESD HBM ESD CDM VCC VI VO IIK IOK IO ICC IGND TJ TSTG Description Human Body Model ESD Protection Charged Device Model ESD Protection Supply Voltage Range Input Voltage Range Voltage Applied to Output in High or Low State Input Clamp Current (VI < 0) Output Clamp Current (VO < 0) Continuous Output Current (VO = 0 to VCC) Continuous Current Through VCC Continuous Current Through GND Operating Junction Temperature Storage Temperature Rating 2 1 -0.5 to +4.6 -0.5 to +4.6 -0.5 to VCC +0.5 50 50 ±20 50 -50 -40 to +150 -65 to +150 Unit kV kV V V V mA mA mA mA mA °C °C Notes: 6. Stresses beyond the absolute maximum may result in immediate failure or reduced reliability. These are stress values and device operation should be within recommend values. 7. Forcing the maximum allowed voltage could cause a condition exceeding the maximum current or conversely forcing the maximum current could cause a condition exceeding the maximum voltage. The ratings of both current and voltage must be maintained within the controlled range. Recommended Operating Conditions (Note 8) (@TA = +25°C, unle.


74AUP1G17 74AUP1G32 74AUP1G34


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)