74LV08

74LV08 Quad 2-input AND gate Rev. 03 — 6 April 2009 Product data sheet 1. General description The 74LV08 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC08 and 74HCT08. The 74LV08 provides a quad 2-input AND function. 2. Features I Wide operating voltage: 1.0 V to 5.5 V I Optimized for low voltage applications: 1.0 V to 3.6 V I Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V I Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C I Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V I Multiple package options I Specified from −40 °C to +85 °C and from −40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74LV08N −40 °C to +125 °C DIP14 74LV08D −40 °C to +125 °C SO14 74LV08DB −40 °C to +125 °C SSOP14 74LV08PW −40 °C to +125 °C TSSOP14 Description plastic dual in-line package; 14 leads (300 mil) plastic small outline package; 14 leads; body width 3.9 mm plastic shrink small outline package; 14 leads; body width 5.3 mm plastic thin shrink small outline package; 14 leads; body width 4.4 mm Version SOT27-1 SOT108-1 SOT337-1 SOT402-1 NXP Semiconductors 4. Functional diagram 74LV08 Quad 2-input AND gate 1 1A 2 1B 4 2A 5 2B 9 3A 10 3B 12 4A 13 4B 1Y 3 2Y 6 3Y 8 4Y 11 mna222 Fig 1. Logic symbol 1 & 2 3 4& 5 6 9& 10 8 ...