74LVC1G00

NEW PRODUCT Description The 74LVC1G00 is a single 2-input positive NAND gate with a standard push-pull output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V, allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing damaging current backflow when the device is powered down. The gate performs the positive Boolean functions: Y = A B or Y = A + B 74LVC1G00 SINGLE 2 INPUT POSITIVE NAND GATE Pin Assignments ( Top View ) ( Top View ) A1 B2 5 Vcc A1 B2 GND 3 5 Vcc 4Y GND 3 4Y SOT25 / SOT353 ( Top View ) A 1 8 Vcc B 2 5 NC GND 3 4 Y X2-DFN1410-6 ( Bottom View ) GND 3 4Y B2 5 NC A1 6 Vcc X2-DFN1409-6 Chip Scale Alternative SOT553 (Top View ) A 1 6 Vcc B 2 5 NC GND 3 4 Y X1-DFN1010-6 (Type B) (Top View ) A 1 6 Vcc B 2 5 NC GND 3 4 Y X2-DFN1010-6 (Top View) A1 5 Vcc 3 GND B2 4Y X2-DFN0808-4 Packages not to scale Features Wide Supply Voltage Range from 1.65 to 5.5V ± 24mA Output Drive at 3.3V CMOS low power consumption IOFF Supports Partial-Power-Down Mode Operation Inputs accept up to 5.5V ESD Protection Tested per JESD 22  Exceeds 200-V Machine Model (A115)  Exceeds 2000-V Human Body Model (A114)  Exceeds 1000-V Charged Device Model (C101) Latch-Up Exceeds 100mA per JESD 78, Class I Range of Package Options Direct Interface with TTL ...