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Genesys Logic, Inc.
GL3321G
USB 3.0 to SATA 6Gb/s Bridge Controller Datasheet
Revision 1.40 Feb. 21, 2013
GL3321G Datasheet
Copyright
Copyright © 2013 Genesys Logic, Inc. All rights reserved. No part of the materials may be reproduced in any form or by any means without prior written consent of Genesys Logic, Inc.
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Disclaimer
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Genesys Logic, Inc.
12F., No. 205, Sec. 3, Beixin Rd., Xindian Dist., New Taipei City, Taiwan Tel: (886-2) 8913-1888 Fax: (886-2) 6629-6168 http://www.genesyslogic.com
©2013 Genesys Logic, Inc. - All rights reserved. GLI Confidential
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Revision 1.00 1.01 1.10 1.20
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GL3321G Datasheet
Revision History
Date 03/14/2012 03/21/2012 08/10/2012 08/17/2012
01/25/2013
02/21/2013
Description
First formal release Modify Chapter 2 Pin assignment Modify Block diagram Modify Feature list Remove windows to go feature Remove BYP pin Remove UASP
©2013 Genesys Logic, Inc. - All rights reserved. GLI Confidential
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GL3321G Datasheet
Table of Contents
CHAPTER 1 FEATURES ..................................................................................................... 6 CHAPTER 2 PIN ASSIGNMENT ........................................................................................ 7
2.1 GL3321G Pinout ....................................................................................................... 7 2.2 GL3321G Pin List ..................................................................................................... 8 2.3 Pin Descriptions ........................................................................................................ 8 CHAPTER 3 BLOCK DIAGRAM ..................................................................................... 11 CHAPTER 4 FUNCTION BLOCK DESCRIPTION ....................................................... 12 4.1 HS / FS PHY (UTM) ............................................................................................... 12 4.2 SuperSpeed PHY..................................................................................................... 12 4.3 USB Controller........................................................................................................ 12 4.4 EP0 / EP3 Buffer ..................................................................................................... 12 4.5 CMD / Status / Data Buffer .................................................................................... 12 4.6 SATA Controller...................................................................................................... 12 4.7 SATA PHY 1.5G / 3G / 6G ...................................................................................... 12 4.8 8051 / MCU.............................................................................................................. 13 4.9 PWMs....................................................................................................................... 13 4.10 SPI Engines.............................................................................................................. 13 4.11 General Purpose IO Description ........................................................................... 14 CHAPTER 5 ELECTRICAL CHARACTERISTICS ...................................................... 15 5.1 Absolute Maximum Ratings................................................................................... 15 5.2 Temperature Conditions......................................................................................... 15 5.3 DC Characteristics.................................................................................................. 15 CHAPTER 6 POWER ON SEQUENCE ........................................................................... 18 CHAPTER 7 PACKAGE OUTLINE ................................................................................. 19 CHAPTER 8 ORDERING INFROMATION .................................................................... 20
©2013 Genesys Logic, Inc. - All rights reserved. GLI Confidential
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GL3321G Datasheet
List of Figures
Figure 2.1 – GL3321.