Document
SH6614 SH6614B SH6614C
4K 4-Bit Microcontroller with LCD Driver
Features
! SH6610C-based single-chip 4-bit microcontroller ! ROM: 4096 X 16 bits ! RAM: 512 X 4 bits ! Operation voltage: 2.4V – 6.0V ! 8 CMOS bi-directional I/O pins ! 4-Level subroutine nesting (include interrupts) ! One 8-bit auto re-load timer/counter ! Wem-up timer for power-on reset ! Powerful interrupt sources:
- External interrupts ( INT0 )
- Internal interrupt (Timer0) - Internal interrupt (Base Timer)
- Port's falling edge interrupt: PORTB ( INT1 ) ! 8-bit Base timer ! LCD driver:
240 dots (1/8 duty 1/4 bias) or 136 dots (1/4 duty 1/3 bias)
! LCD used as scan output ! Built-in dual tone PSG with one noise generator ! 2 Clock sources
OSC: (code option select crystal or RC type)
- Crystal oscillator 32.768K
- RC oscillator: 262K
OSCX: (system register selected ceramic or RC type)
- Ceramic oscillator 455K
- RC oscillator 1.8M or 2M ! Instruction cycle time:
- 122.07µs for 32.768 KHz crystal
- 15.27µs for 262 KHz RC
- 8.79µs for 455KHz ceramic
- 2.22µs for 1.8 MHz RC
- 2µs for 2.0 MHz RC ! Two low power operation modes: HALT and STOP ! Low power consumption
General Description
SH6614 (SH6614B, SH6614C) is a single chip microcontroller integrated with SRAM, timer and dual-tone PSG, LCD driver, and I/O port. This chip builds in a dual-oscillator to enhance the total chip performance.
Pin Configuration
QFP64
R
ET
SSS
PPPPPP
S
E
EEE
A A B B B B V ENNN S V V V VGGG
2
3
0
1
2
3
D D
T
CCC
T
4
3
2
1
1
2
3
PA1 PA0 OSCXI OSCXO GND OSCO OSCI COM1 COM2 COM3 COM4 COM5 COM6
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
52
53
54
55
56 57
SH6614
58 SH6614B
59 SH6614C
60
61
62
63
64
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
32 31 30 29 28 27 26 25 24 23 22 21 20
SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16
CCS S S S S SNNNS S S S S S S S
OOE E E E E ECCC E E E E E E E E
MMGGGGGG
GGGGGGGG
78322222
22222111
098765
43210987
1 V2.2
QFP100
Pad Configuration
COM8 NC
SEG30 NC
SEG29 NC
SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21
NC SEG20
NC SEG19
NC SEG18
CCCCCCCOO
SS
OOOOOOOS SGCCP P P
MNMNMNMNMNMNMNCNCNNNX NX NA NAN AN
7 C 6 C 5 C 4 C 3 C 2 C 1 C I COCDCOC I C 0 C 1 C 2 C
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
81 50 82 49 83 48 84 47 85 46 86 45
SH661487 44
88 43
SH6614B89 42
90 41 91 40
SH6614C92 39
93 38 94 37 95 36 96 35 97 34 98 33 99 32 100 31
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
S N S N S N S N S N S N S N SMS ECECECECECECECECE GGGGGGGGG 111111119 76543210
N S N S N S N SN S N S N C E C E C E C EC E C E C
G G G GG G 8 7 6 54 3
PA3 NC PB0 NC PB1 NC PB2 PB3
VDD RESET TEST V4 V3 V2 NC V1 NC SEG1 NC SEG2
SS S S S S S S S S S S S C C
EE E E E E E E E E E E E 8 7
GG G G G G G G G G G G G 11 2 2 2 2 2 2 2 2 2 2 3 89 0 1 2 3 4 5 6 7 8 9 0
/ S 3 1
/ S 3 2
SEG17 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
SEG16 45
28 COM6/SEG33
SEG15 46
27 COM5/SEG34
SEG14 47
26 COM4
SEG13 48
25 COM3
SEG12 49 SEG11 50 SEG10 51
SEG9 52 SEG8 53
SH6614 SH6614B SH6614C
24 COM2
23 COM1
22 OSCI
21 OSCO
GND 20
PC.0
SEG7 54
19 OSCXO
SEG6 55
18 OSCXI
SEG5 56 SEG4 57
VDD 9
17 PA.0 16 PA.1
58 1 2 3 4 5 6 7 8
10 11 12 13 14 15 PA.2
_ S S S V V V VT RPP P P P P
E E E 1 2 3 4 E E C. B. B. B. B. A.
GGG 321
S S1 3 21 03
T
E T
SH6614/B/C
2
Block Diagram
SH6614/B/C
SH6610C CPU CORE
RESET
GND
ROM (4096 X 16) RAM (512 X 4) 8-BIT TIMER0 PORTB
OSCS
PORTA & EXTERNAL INT
LCD RAM
PSG
COMMON DRIVER
SEGMENT DRIVER
SCAN REGISTER
CPU OPERATING VOLTAGE LCD VOLTAGE GENERATOR
OSCI OSCO OSCXI OSCXO
PORTB [0:3] PA.1 (PSG) PA.0 (INT0 ) PA.2 (PSG) PA.3
COM [1:8]
SEG [1:34]
3
SH6614/B/C
Pin Description (QFP64)
PIN No.
Designation
3-8
SEG30 - SEG25
12 - 35
36 - 39 40 44 45
46 - 49
50 - 53
54 55 56 57 58 59 - 62 63 - 64, 1 - 2
SEG24 - SEG1
V1 - V4 TEST RESET VDD Port B.3 - Port B.0
Port A.3 - Port A.0
OSCXI OSCXO
GND OSCO OSCI COM1 – COM4 COM5 - COM8
I/O Description
O
Segment signal output for LCD display; shared with scan output
O
Segment signal output for LCD display; shared with scan output
I Connected with external LCD divided resistance I Test pin (Internal pull-low). No connect for user I Reset input (No internal pull-up) P Power supply
I/O Bit programmable I/O ,Vector interrupt ( INT1 )
I/O Bit programmable I/O,PA.0 shared with INT0 PA.1 , PA.2 shared with PSG output
I Oscillator X input O Oscillator X output P Ground O Oscillator output I Oscillator input O Common signal output for LCD display O Common/segment signal output for LCD display
Pin Description (QFP100)
PIN No.
1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33
83, 85, 87 - 94, 96, 98, 100
35, 37 - 39 40 41 42
43, 44, 46, 48
Designation
SEG17 - SEG1
SEG30 - SEG18 V1 - V4 TEST RESET VDD
Port B.3 - Port B.0
I/O
O
O I I I P I/O
50, 52, 54, 56
Port A.3 - Port A.0
.