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UPA2211T1M Dataheets PDF



Part Number UPA2211T1M
Manufacturers Renesas
Logo Renesas
Description P-CHANNEL MOS FET
Datasheet UPA2211T1M DatasheetUPA2211T1M Datasheet (PDF)

DATA SHEET MOS FIELD EFFECT TRANSISTOR μ PA2211T1M P-CHANNEL MOS FET FOR SWITCHING DESCRIPTION The μ PA2211T1M is P-channel MOS Field Effect Transistor designed for power management applications of portable equipments, such as load switch. FEATURES • Low on-state resistance RDS(on)1 = 25 mΩ MAX. (VGS = −4.5 V, ID = −7.5 A) RDS(on)2 = 34 mΩ MAX. (VGS = −2.5 V, ID = −3.8 A) RDS(on)3 = 66 mΩ MAX. (VGS = −1.8 V, ID = −3.8 A) • Built-in gate protection diode • −1.8 V Gate drive available ORDERING .

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DATA SHEET MOS FIELD EFFECT TRANSISTOR μ PA2211T1M P-CHANNEL MOS FET FOR SWITCHING DESCRIPTION The μ PA2211T1M is P-channel MOS Field Effect Transistor designed for power management applications of portable equipments, such as load switch. FEATURES • Low on-state resistance RDS(on)1 = 25 mΩ MAX. (VGS = −4.5 V, ID = −7.5 A) RDS(on)2 = 34 mΩ MAX. (VGS = −2.5 V, ID = −3.8 A) RDS(on)3 = 66 mΩ MAX. (VGS = −1.8 V, ID = −3.8 A) • Built-in gate protection diode • −1.8 V Gate drive available ORDERING INFORMATION PART NUMBER μ PA2211T1M-T1-AT Note μ PA2211T1M-T2-AT Note PACKING 8 mm embossed taping 3000 p/reel PACKAGE 8-pin VSOF (1629) 0.011 g TYP. Note Pb-free (This product does not contain Pb in external electrode and other parts.) 0.225±0.1 PACKAGE DRAWING (Unit: mm) 2.9±0.1 0.65 8 5 A 0.145±0.05 0 to 0.025 1.9±0.1 1.6±0.1 1 0.32±0.05 4 0.05 M S A 0.8±0.05 S 0.05 S 1, 2, 3, 6, 7, 8: Drain 4 : Gate 5 : Source ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) VDSS −12 V Gate to Source Voltage (VDS = 0 V) VGSS m8 V Drain Current (DC) Drain Current (pulse) Note1 Total Power Dissipation Note2 Total Power Dissipation (PW = 5 sec) Note2 ID(DC) ID(pulse) PT1 PT2 m7.5 m30 1.1 2.5 A A W W Channel Temperature Tch 150 °C Storage Temperature Tstg −55 to +150 °C Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1% 2. Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt EQUIVALENT CIRCUIT Drain Gate Body Diode Gate Protection Diode Source Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G19452EJ1V0DS00 (1st edition) Date Published September 2008 NS Printed in Japan 2008 μ PA2211T1M ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. Zero Gate Voltage Drain Current IDSS Gate Leakage Current IGSS Gate to Source Cut-off Voltage Forward Transfer Admittance Note Drain to Source On-state Resistance Note VGS(off) | yfs | RDS(on)1 RDS(on)2 RDS(on)3 Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Turn-on Delay Time td(on) Rise Time tr Turn-off Delay Time td(off) Fall Time tf Total Gate Charge QG Gate to Source Charge QGS Gate to Drain Charge Body Diode Forward Voltage Note QGD VF(S-D) Reverse Recovery Time trr Reverse Recovery Charge Qrr VDS = −12 V, VGS = 0 V VGS = m8 V, VDS = 0 V VDS = −10 V, ID = −1 mA VDS = −10 V, ID = −3.8 A VGS = −4.5 V, ID = −7.5 A VGS = −2.5 V, ID = −3.8 A VGS = −1.8 V, ID = −3.8 A VDS = −10 V, VGS = 0 V, f = 1 MHz VDD = −10 V, ID = −3.8 A, VGS = −4.0 V, RG = 10 Ω VDD = −9.6 V, VGS = −4.5 V, ID = −7.5 A IF = −7.5 A, VGS = 0 V IF = −7.5 A, VGS = 0 V, di/dt = −47 A/μs −0.45 5 Note Pulsed TYP. 21 25 34 1350 255 215 10.7 16.7 101.0 76.4 14.9 2.8 4.0 0.88 60 19 MAX. -10 m10 −1.5 25 34 66 1.2 UNIT μA μA V S mΩ mΩ mΩ pF pF pF ns ns ns ns nC nC nC V ns nC TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE D.U.T. RG PG. VGS (−) 0 τ τ = 1μs Duty Cycle ≤ 1% RL VDD VGS (−) VGS Wave Form 10% 0 VDS (−) 90% VDS VDS Wave Form 0 td(on) 90% VGS 90% 10% 10% tr td(off) tf ton toff D.U.T. IG = −2 mA PG. 50 Ω RL VDD 2 Data Sheet G19452EJ1V0DS μ PA2211T1M TYPICAL CHARACTERISTICS (TA = 25°C) dT - Percentage of Rated Power - % DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 120 100 80 60 40 20 0 0 25 50 75 100 125 150 175 TA - Ambient Temperature - °C ID - Drain Current - A FORWARD BIAS SAFE OPERATING AREA -100 -10 -1 -0.1 -0.01 ID(pulse) ID(DC) RD S((VonG)SL=im−i4t e.5d V ) Single Pulse PW = 300 Po wer 1i 0 0 5i s Dissipat 1i 0 msi ion 1i msi msi Limit ed μs Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt -0.01 -0.1 -1 -10 VDS - Drain to Source Voltage - V -100 1000 TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH Rth(ch-A) = 113.6°C/Wi 100 rth(t) - Transient Thermal Resistance - °C/W 10 ID - Drain Current - A 1 0.1 100 μ Single Pulse Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt 1m 10 m 100 m 1 10 PW - Pulse Width - s 100 1000 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE -30 FORWARD TRANSFER CHARACTERISTICS -100 ID - Drain Current - A -25 VGS = −4.5 V -20 −2.5 V -15 -10 Tch = −25°C -1 25°C 75°C -0.1 125°C -10 -5 -0 -0 −1.8 V Pulsed -0.2 -0.4 -0.6 VDS - Drain to Source Voltage - V -0.8 -0.01 -0.001 -0.0001 0 VDS = −10 V Pulsed -0.5 -1 -1.5 VGS - Gate to Source Voltage - V -2 .


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