D-S MOSFET. B3450 Datasheet


B3450 MOSFET. Datasheet pdf. Equivalent


B3450


N-Channel 30-V (D-S) MOSFET
N- Channel 30-V (D-S) MOSFET

B3450

General Description
The B3450 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management and other battery powered circuits where high-side switching and low in-line power loss are needed in a very small outline surface mount package.
Pin Configuration
SD SD SD GD

Features
RDS(ON)=28mΩ@VGS=10V RDS(ON)=42mΩ@VGS=4.5V Super High Density Cell Design for Extremely Low RDS(ON) Exceptional On-Resistance and Maximum DC Current SOP-8 Package
Applications
Power Management in Note book Portable Equipment Battery Powered System DC/DC Converter Load Switch DSC

℃Absolute Maximum Ratings (TA=25 Unless Otherwise Noted):

Parameter

Drain-Source Voltage

Gate-Source Voltage
℃Continuous Drain
Current(tJ=150 )

℃TA=25 ℃TA=70

Pulsed Drain Current Maximum Power Dissipation

℃TA=25 ℃TA=70

Operating Junction Temperature

Thermal Resistance-Junction to Case

Symbol VDSS VGSS
ID
IDM
PD
TJ RθJC

N-Channel 30 ±20 6.9 5.8 30 2.0 1.3
-55 to 150 48

Unit V V
A
A
W
℃ ℃/W

Confidential material for authorized user only and BiTEK reserves the utmost right upon the information contained herei...



B3450
N- Channel 30-V (D-S) MOSFET
B3450
General Description
The B3450 is the N-Channel logic enhancement
mode power field effect transistors are produced
using high cell density, DMOS trench technology.
This high density process is especially tailored to
minimize on-state resistance. These devices are
particularly suited for low voltage application such
as cellular phone and notebook computer power
management and other battery powered circuits
where high-side switching and low in-line power
loss are needed in a very small outline surface
mount package.
Pin Configuration
SD
SD
SD
GD
Features
RDS(ON)=28m@VGS=10V
RDS(ON)=42m@VGS=4.5V
Super High Density Cell Design for
Extremely Low RDS(ON)
Exceptional On-Resistance and
Maximum DC Current
SOP-8 Package
Applications
Power Management in Note book
Portable Equipment
Battery Powered System
DC/DC Converter
Load Switch
DSC
Absolute Maximum Ratings (TA=25 Unless Otherwise Noted):
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain
Current(tJ=150 )
TA=25
TA=70
Pulsed Drain Current
Maximum Power Dissipation
TA=25
TA=70
Operating Junction Temperature
Thermal Resistance-Junction to Case
Symbol
VDSS
VGSS
ID
IDM
PD
TJ
RθJC
N-Channel
30
±20
6.9
5.8
30
2.0
1.3
-55 to 150
48
Unit
V
V
A
A
W
/W
Confidential material for authorized user only and BiTEK
reserves the utmost right upon the information contained herein.
2
www.BiTEK.com.tw




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