FQD12P10TM_F085 P-Channel MOSFET Datasheet

FQD12P10TM_F085 Datasheet, PDF, Equivalent


Part Number

FQD12P10TM_F085

Description

100V P-Channel MOSFET

Manufacture

Fairchild Semiconductor

Total Page 8 Pages
Datasheet
Download FQD12P10TM_F085 Datasheet


FQD12P10TM_F085
February 2010
FQD12P10TM_F085
100V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as audio amplifier,
high efficiency switching DC/DC converters, and DC motor
control.
Features
• -9.4A, -100V, RDS(on) = 0.29@VGS = -10 V
• Low gate charge ( typical 21 nC)
• Low Crss ( typical 65 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
Qualified to AEC Q101
RoHS Compliant
tm
DD
G S D-PAK
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
(Note 3)
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8! from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθJA
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
©2010 Fairchild Semiconductor Corporation
FQD12P10TM_F085 Rev. A
1
G
Ratings
-100
-9.4
-6.0
-37.6
± 30
370
-9.4
5.0
-6.0
2.5
50
0.4
-55 to +150
300
S
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Typ Max Units
-- 2.5 °C/W
-- 50 °C/W
-- 110 °C/W
www.fairchildsemi.com

FQD12P10TM_F085
Electrical Characteristics
Symbol
Parameter
TC = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS Drain-Source Breakdown Voltage
BVDSS Breakdown Voltage Temperature
/ TJ Coefficient
IDSS
Zero Gate Voltage Drain Current
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
VGS = 0 V, ID = -250 µA
ID = -250 µA, Referenced to 25°C
VDS = -100 V, VGS = 0 V
VDS = -80 V, TC = 125°C
VGS = -30 V, VDS = 0 V
VGS = 30 V, VDS = 0 V
-100
--
--
--
--
--
--
-0.1
--
--
--
--
--
--
-1
-10
-100
100
V
V/°C
µA
µA
nA
nA
On Characteristics
VGS(th) Gate Threshold Voltage
RDS(on) Static Drain-Source
On-Resistance
gFS Forward Transconductance
VDS = VGS, ID = -250 µA
-2.0 --
-4.0
VGS = -10 V, ID = -4.7 A
-- 0.24 0.29
VDS = -40 V, ID = -4.7 A (Note 4)
--
6.3
--
V
S
Dynamic Characteristics
Ciss Input Capacitance
Coss
Output Capacitance
Crss Reverse Transfer Capacitance
VDS = -25 V, VGS = 0 V,
f = 1.0 MHz
-- 620 800 pF
-- 220 290 pF
-- 65 85 pF
Switching Characteristics
td(on)
Turn-On Delay Time
tr Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf Turn-Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDD = -50 V, ID = -11.5 A,
RG = 25
(Note 4, 5)
VDS = -80 V, ID = -11.5 A,
VGS = -10 V
(Note 4, 5)
--
--
--
--
--
--
--
15 40
160 330
35 80
60 130
21 27
4.6 --
11.5 --
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
-- -- -9.4 A
ISM Maximum Pulsed Drain-Source Diode Forward Current
-- -- -37.6 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -9.4 A
-- -- -4.0 V
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = -11.5 A,
-- 110
dIF / dt = 100 A/µs
(Note 4) -- 0.47
--
--
ns
µC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 6.3mH, IAS = -9.4A, VDD = -25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD " -11.5A, di/dt " 300A/µs, VDD " BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width " 300µs, Duty cycle " 2%
5. Essentially independent of operating temperature
FQD12P10TM_F085 Rev. A
2
www.fairchildsemi.com


Features FQD12P10TM_F085 P-Channel MOSFET Februa ry 2010 FQD12P10TM_F085 100V P-Channel MOSFET General Description These P-Cha nnel enhancement mode power field effec t transistors are produced using Fairch ild’s proprietary, planar stripe, DMO S technology. This advanced technology has been especially tailored to minimiz e on-state resistance, provide superior switching performance, and withstand h igh energy pulse in the avalanche and c ommutation mode. These devices are well suited for low voltage applications su ch as audio amplifier, high efficiency switching DC/DC converters, and DC moto r control. Features • -9.4A, -100V, RDS(on) = 0.29Ω @VGS = -10 V • Low gate charge ( typical 21 nC) • Low Cr ss ( typical 65 pF) • Fast switching • 100% avalanche tested • Improved dv/dt capability • Qualified to AEC Q 101 • RoHS Compliant tm DD G S D-P AK Absolute Maximum Ratings TC = 25°C unless otherwise noted Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL Parameter Drain-Source Voltage Drain C.
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