CTS100ELT22TG PECL Translator Datasheet

CTS100ELT22TG Datasheet, PDF, Equivalent


Part Number

CTS100ELT22TG

Description

Dual CMOS/TTL to Differential PECL Translator

Manufacture

CTS

Total Page 6 Pages
Datasheet
Download CTS100ELT22TG Datasheet


CTS100ELT22TG
CTS100ELT22
Dual CMOS/TTL to Differential PECL Translator
MSOP8, SOIC8
FEATURES
0.5ns Typical Propogation Delay
<100ps Typical Output to Output Skew
Flow Through Pinouts
Differential PECL Output
RoHS Compliant Pb Free Packages
BLOCK DIAGRAM
DESCRIPTION
The CTS100ELT22 is a dual CMOS/TTL to differential PECL translator. Because PECL (Positive ECL)
levels are used, only VCC and ground are required. The small outline packaging and the low skew, dual
gate design of the CTS100ELT22 makes it ideal for applications that require the translation of a clock and
a data signal.
The CTS100ELT22 is a direct replacement for the ON Semi MC100ELT22, MC100LVELT22 and Micrel
SY89322V.
ENGINEERING NOTES
When the D input is left floating, the Q output is forced HIGH, and the Q output is forced LOW.
CTS100ELT22 Large Signal Bandwidth
North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors
Specifications are subject to change without notice.
1
RevB0215

CTS100ELT22TG
CTS100ELT22
Dual CMOS/TTL to Differential PECL Translator
MSOP8, SOIC8
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings are those values beyond which device life may be impaired.
Symbol
VCC
VIN
IOUT
TA
TSTG
ESDHBM
ESDMM
ESDCDM
Characteristic
DC Power Supply
Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Human Body Model
Machine Model
Charged Device Model
Condition
(VEE = 0V)
(VEE = 0V)
Continuous
Surge
Rating
0 to +8.0
0 to +6.0
50
100
-40 to +85
-65 to +150
2500
200
2500
Unit
V
V
mA
°C
°C
V
V
V
Symbol
IIH
IIHH
IIL
VIK
VIH
VIL
TTL/CMOS Input DC Characteristics (GND = 0.0V, VCC = +3.3V to 5.5V)
Characteristic
Condition
Min Typ Max
Input HIGH Current
Input HIGH Current
Input LOW Current
VIN = 2.7V
VIN = VCC
VIN = 0.5V
15
20
-0.1
Input Clamp Diode Voltage
IIN = -18mA
-1.2
Input HIGH Voltage
Input LOW Voltage
2
0.8
Unit
µA
µA
mA
V
V
V
Symbol
VOH
VOL
ICC
1
2
3
LVPECL DC Characteristics (GND = 0.0V, VCC = +3.3V)
Characteristic
Output HIGH
Voltage1, 2
Output LOW
Voltage1, 2
Power Supply
Current3
-40 °C
0 °C
Min
2160
Typ Max Min Typ Max
2420 2205
2420
1470
1745 1490
1680
24 24
Each output is terminated through a 50resistor to VCC - 2V.
Output parameters vary 1:1 with VCC.
ICC measurements must be done with outputs open.
25 °C
Min Typ Max
2235 2345 2420
1490 1595 1680
24
85 °C
Min Typ Max
2255
2420
1490
1680
25
Unit
mV
mV
Ma
North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors
Specifications are subject to change without notice.
2
RevB0215


Features CTS100ELT22 Dual CMOS/TTL to Differentia l PECL Translator MSOP8, SOIC8 FEATURE S  0.5ns Typical Propogation Delay <100ps Typical Output to Output Skew  Flow Through Pinouts  Different ial PECL Output  RoHS Compliant Pb F ree Packages BLOCK DIAGRAM DESCRIPTIO N The CTS100ELT22 is a dual CMOS/TTL to differential PECL translator. Because PECL (Positive ECL) levels are used, on ly VCC and ground are required. The sma ll outline packaging and the low skew, dual gate design of the CTS100ELT22 mak es it ideal for applications that requi re the translation of a clock and a dat a signal. The CTS100ELT22 is a direct r eplacement for the ON Semi MC100ELT22, MC100LVELT22 and Micrel SY89322V. ENGIN EERING NOTES When the D input is left f loating, the Q output is forced HIGH, a nd the Q output is forced LOW. CTS100E LT22 Large Signal Bandwidth North Amer icas: +1-800-757-6686 • International : +1-508-435-6831 • Asia: +65-655-175 51 • www.ctscorp.com/semiconductors Specifications are subject to change wit.
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