AFE1230

AFE1230 AFE1230 SBWS015A – AUGUST 2001 G.SHDSL ANALOG FRONT-END FEATURES q E1, T1, AND SUBRATE OPERATION q COMPLIES WITH G.SHDSL AND HDSL2 q 16-BIT, DELTA-SIGMA CONVERTERS q ON-CHIP DRIVER AND PGA q PROGRAMMABLE tx AND rx FILTERS q SERIAL DIGITAL INTERFACE q 750mW POWER DISSIPATION AT E1 q +5V POWER (5V OR 3.3V DIGITAL) q SSOP-28 PACKAGE q –40°C TO +85°C TEMPERATURE RANGE DESCRIPTION Texas Instrument’s analog front-end chip, the AFE1230, is designed to greatly reduce the size and cost of G.SHDSL and HDSL2 application designs. It provides a transceiver as the line interface between the Digital Signal Processor (DSP) and the local loop. The AFE1230 is designed to handle upstream and downstream data transmission over a wide range of data rates from 64kbps to 2.5Mbps. Functionally, this unit consists of a transmitter and receiver section. The transmitter section consists of a digital interpolation filter, a 16-bit, delta-sigma Digital-to-Analog (D/A) converter, a digitally programmable fifth-order or seventh-order SC (Switched Capacitor) low-pass filter, and a differential output line driver. The receiver section includes an input Programmable Gain Amplifier (PGA), a 16-bit, delta-sigma Analog-to-Digital (A/D) converter, and a programmable decimation filter. The AFE1230 receives a 16-bit data word plus an 8-bit control byte via the serial interface to facilitate the D/A conversion and control functions. The subsequent analog signal is sent to the on-chip line driver that prov...