Document
STB24N60M2, STI24N60M2, STP24N60M2, STW24N60M2
N-channel 600 V, 0.168 Ω typ., 18 A MDmesh II Plus™ low Qg
22
Power MOSFET in D PAK, I PAK, TO-220 and TO-247 packages
Datasheet − production data
TAB
2 3
1
D2PAK
TAB
TAB
123
I2PAK
3 2 1
TO-220
3 2 1
TO-247
Figure 1. Internal schematic diagram
D(2, TAB)
Features
Order codes VDS @ TJmax RDS(on) max ID
STB24N60M2 STI24N60M2 STP24N60M2 STW24N60M2
650 V
0.19 Ω 18 A
• Extremely low gate charge • Lower RDS(on) x area vs previous generation • Low gate input resistance • 100% avalanche tested • Zener-protected
Applications
• Switching applications
G(1) S(3)
AM01476v1
Description
These devices are N-channel Power MOSFETs developed using a new generation of MDmesh™ technology: MDmesh II Plus™ low Qg. These revolutionary Power MOSFETs associate a vertical structure to the company's strip layout to yield one of the world's lowest on-resistance and gate charge. They are therefore suitable for the most demanding high efficiency converters.
Order codes STB24N60M2 STI24N60M2 STP24N60M2 STW24N60M2
Table 1. Device summary
Marking
Package
24N60M2
2
D PAK
2
I PAK TO-220
TO-247
Packaging Tape and reel
Tube
February 2014
This is information on a product in full production.
DocID023964 Rev 5
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www.st.com
21
Contents
Contents
STB24N60M2, STI24N60M2, STP24N60M2, STW24N60M2
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21 DocID023964 Rev 5
STB24N60M2, STI24N60M2, STP24N60M2, STW24N60M2
1 Electrical ratings
Electrical ratings
Symbol
Table 2. Absolute maximum ratings
Parameter
Value
VGS Gate-source voltage ID Drain current (continuous) at TC = 25 °C ID Drain current (continuous) at TC = 100 °C
(1)
IDM Drain current (pulsed) PTOT Total dissipation at TC = 25 °C
(2)
dv/dt Peak diode recovery voltage slope
(3)
dv/dt MOSFET dv/dt ruggedness
Tstg Storage temperature Tj Max. operating junction temperature
1. Pulse width limited by safe operating area. 2. ISD ≤ 18 A, di/dt ≤ 400 A/μs; VDS peak < V(BR)DSS, VDD=400 V. 3. VDS ≤ 480 V
± 25 18 12 72 150 15 50
- 55 to 150
Unit V A A A W
V/ns V/ns
°C
Symbol
Table 3. Thermal data
Parameter
Value Unit
D2PAK I2PAK TO-220 TO-247
Rthj-case Thermal resistance junction-case max
(1)
Rthj-pcb Thermal resistance junction-pcb max Rthj-amb Thermal resistance junction-ambient max
1. When mounted on 1 inch² FR-4, 2 Oz copper board
30
0.83 62.5
°C/W °C/W 50 °C/W
Symbol
Table 4. Avalanche characteristics
Parameter
Value
Avalanche current, repetitive or not IAR repetitive (pulse width limited by Tjmax )
Single pulse avalanche energy (starting EAS Tj=25°C, ID= IAR; VDD=50)
3.5 180
Unit A mJ
DocID023964 Rev 5
3/21
Electrical characteristics
STB24N60M2, STI24N60M2, STP24N60M2, STW24N60M2
2 Electrical characteristics
(TC = 25 °C unless otherwise specified)
Symbol
Parameter
Table 5. On /off states Test conditions
Drain-source V(BR)DSS breakdown voltage
ID = 1 mA, VGS = 0
IDSS
IGSS VGS(th) RDS(on)
Zero gate voltage
VDS = 600 V
drain current (VGS = 0) VDS = 600 V, TC=125 °C
Gate-body leakage current (VDS = 0)
VGS = ± 25 V
Gate threshold voltage VDS = VGS, ID = 250 μA
Static drain-source on-resistance
VGS = 10 V, ID = 9 A
Min. Typ. Max. Unit 600 V
1 μA 100 μA ±10 μA 2 3 4V 0.168 0.19 Ω
Symbol
Parameter
Table 6. Dynamic Test conditions
Min. Typ. Max. Unit
Ciss Coss Crss
Input capacitance
Output capacitance
Reverse transfer capacitance
VDS = 100 V, f = 1 MHz, VGS = 0
- 1060 - pF
- 55 - pF
pF - 2.2 -
(1) Equivalent output Coss eq. capacitance
VDS = 0 to 480 V, VGS = 0
- 258 - pF
Intrinsic gate RG resistance
f = 1 MHz, ID = 0
- 7 -Ω
Qg Total gate charge
VDD = 480 V, ID = 18 A,
Qgs Gate-source charge VGS = 10 V
Qgd Gate-drain charge
(see Figure 17)
- 29 - nC - 6 - nC - 12 - nC
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS
Symbol
Table 7. Switching times
Parameter
Test conditions
td(on) tr
td(off) tf
Turn-on delay time Rise time Turn-off delay time Fall time
VDD = 300 V, ID = 9 A, RG = 4.7 Ω, VGS = 10 V (see Figure 16 and 21)
Min. -
Typ. Max. Unit 14 - ns 9 - ns 60 - ns 15 - ns
4/21 DocID023964 Rev 5
STB24N60M2, STI24N60M2, STP24N60M2, STW24N60M2
Electrical characteristics
Symbol
Table 8. Source drai.