Document
CAV25320
32-Kb SPI Serial CMOS EEPROM
Description The CAV25320 is a 32−Kb Serial CMOS EEPROM device
internally organized as 4096x8 bits. This features a 32−byte page write buffer and supports the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are clock input (SCK), data input (SI) and data output (SO) lines. The HOLD input may be used to pause any serial communication with the CAV25320 device. The device features software and hardware write protection, including partial as well as full array protection.
Features
• Automotive Temperature Grade 1 (−40°C to +125°C) • 10 MHz SPI Compatible • 2.5 V to 5.5 V Supply Voltage Range • SPI Modes (0,0) & (1,1) • 32−byte Page Write Buffer • Self−timed Write Cycle • Hardware and Software Protection • CAV Prefix for Automotive and Other Applications Requiring Site
and Change Control
• Block Write Protection
− Protect 1/4, 1/2 or Entire EEPROM Array
• Low Power CMOS Technology • 1,000,000 Program/Erase Cycles • 100 Year Data Retention • SOIC and TSSOP 8−lead Packages • This Device is Pb−Free, Halogen Free/BFR Free, and RoHS
Compliant
VCC
SI
CS WP HOLD SCK
CAV25320
SO
VSS Figure 1. Functional Symbol
http://onsemi.com
SOIC−8 V SUFFIX CASE 751BD
TSSOP−8 Y SUFFIX CASE 948AL
PIN CONFIGURATION
CS 1 SO WP VSS
VCC HOLD SCK SI
SOIC (V), TSSOP (Y)
Pin Name CS SO WP VSS SI SCK
HOLD VCC
PIN FUNCTION Function
Chip Select Serial Data Output Write Protect Ground Serial Data Input Serial Clock Hold Transmission Input Power Supply
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
October, 2013 − Rev. 1
1
Publication Order Number: CAV25320/D
CAV25320
Table 1. ABSOLUTE MAXIMUM RATINGS Parameters
Ratings
Units
Operating Temperature
−45 to +130
°C
Storage Temperature
−65 to +150
°C
Voltage on any Pin with Respect to Ground (Note 1)
−0.5 to +6.5
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. The DC input voltage on any pin should not be lower than −0.5 V or higher than VCC + 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than −1.5 V or overshoot to no more than VCC + 1.5 V, for periods of less than 20 ns.
Table 2. RELIABILITY CHARACTERISTICS (Note 2)
Symbol
Parameter
Min Units
NEND (Note 3) Endurance
1,000,000
Program / Erase Cycles
TDR Data Retention
100 Years
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100 and JEDEC test methods.
3. Page Mode, VCC = 5 V, 25°C.
Table 3. D.C. OPERATING CHARACTERISTICS (VCC = 2.5 V to 5.5 V, TA = −40°C to +125°C, unless otherwise specified.)
Symbol
Parameter
Test Conditions
Min Max Units
ICCR ICCW ISB1
Supply Current (Read Mode) Supply Current (Write Mode) Standby Current
ISB2 Standby Current
IL ILO
VIL VIH VOL1 VOH1
Input Leakage Current Output Leakage Current
Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage
Read, VCC = 5.5 V, 10 MHz, SO open Write, VCC = 5.5 V, CS = VCC VIN = GND or VCC, CS = VCC, WP = VCC, VCC = 5.5 V VIN = GND or VCC, CS = VCC, WP = GND, VCC = 5.5 V VIN = GND or VCC CS = VCC, VOUT = GND or VCC
IOL = 3.0 mA IOH = −1.6 mA
2 mA 3 mA 4 mA
6 mA
−2 2 mA −1 2 mA
−0.5 0.7 VCC
VCC − 0.8 V
0.3 VCC VCC + 0.5
0.4
V V V V
Table 4. PIN CAPACITANCE (Note 2) (TA = 25°C, f = 1.0 MHz, VCC = +5.0 V)
Symbol
Test
Conditions
COUT CIN
Output Capacitance (SO) Input Capacitance (CS, SCK, SI, WP, HOLD)
VOUT = 0 V VIN = 0 V
Min Typ Max Units 8 pF 8 pF
http://onsemi.com 2
CAV25320
Table 5. A.C. CHARACTERISTICS (TA = −40°C to +125°C) (Note 4)
VCC = 2.5 V − 5.5 V
Symbol
Parameter
Min Max
fSCK
Clock Frequency
DC 10
tSU Data Setup Time
10
tH Data Hold Time
10
tWH SCK High Time
40
tWL SCK Low Time
40
tLZ HOLD to Output Low Z
25
tRI (Note 5)
Input Rise Time
2
tFI (Note 5)
Input Fall Time
2
tHD HOLD Setup Time
0
tCD HOLD Hold Time
10
tV Output Valid from Clock Low
35
tHO Output Hold Time
0
tDIS Output Disable Time
20
tHZ HOLD to Output High Z
25
tCS CS High Time
40
tCSS
CS Setup Time
30
tCSH
CS Hold Time
30
tCNS
CS Inactive Setup Time
20
tCNH
CS Inactive Hold Time
20
tWPS
WP Setup Time
10
tWPH
WP Hold Time
10
tWC (Note 6)
Write Cycle Time
5
4. AC Test Conditions: Input Pulse Voltages: 0.3 VCC to 0.7 VCC Input rise and fall times: ≤ 10 ns Input and output reference voltages: 0.5 VCC Output load: current source IOL max/IOH max; CL = 30 pF
5. This parameter is tested initially and after a design or process change that affects the parameter. 6. tWC is th.