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CAV93C56 Dataheets PDF



Part Number CAV93C56
Manufacturers ON Semiconductor
Logo ON Semiconductor
Description EEPROM
Datasheet CAV93C56 DatasheetCAV93C56 Datasheet (PDF)

CAV93C56 EEPROM Serial 2-Kb Microwire - Automotive Grade 1 Description The CAV93C56 is an EEPROM Serial 2−Kb Microwire Automotive Grade 1 device, which is organized as either 128 registers of 16 bits (ORG pin at VCC) or 256 registers of 8 bits (ORG pin at GND). Each register can be written (or read) serially by using the DI (or DO) pin. The CAV93C56 features sequential read and self−timed internal write with auto−clear. On−chip Power−On Reset circuitry protects the internal logic against poweri.

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CAV93C56 EEPROM Serial 2-Kb Microwire - Automotive Grade 1 Description The CAV93C56 is an EEPROM Serial 2−Kb Microwire Automotive Grade 1 device, which is organized as either 128 registers of 16 bits (ORG pin at VCC) or 256 registers of 8 bits (ORG pin at GND). Each register can be written (or read) serially by using the DI (or DO) pin. The CAV93C56 features sequential read and self−timed internal write with auto−clear. On−chip Power−On Reset circuitry protects the internal logic against powering up in the wrong state. Features • Automotive AEC−Q100 Grade 1 (−40°C to +125°C) Qualified • High Speed Operation: 2 MHz • 2.5 V to 5.5 V Supply Voltage Range • Selectable x8 or x16 Memory Organization • Sequential Read • Software Write Protection • Power−up Inadvertant Write Protection • Low Power CMOS Technology • 1,000,000 Program/Erase Cycles • 100 Year Data Retention • 8−pin SOIC and TSSOP Packages • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant VCC ORG CS SK DI CAV93C56 DO www.onsemi.com SOIC−8 V SUFFIX CASE 751BD TSSOP−8 Y SUFFIX CASE 948AL PIN CONFIGURATIONS CS 1 SK DI DO VCC NC ORG GND SOIC (V), TSSOP (Y) (Top View) Pin Name CS SK DI DO VCC GND ORG NC PIN FUNCTION Function Chip Select Clock Input Serial Data Input Serial Data Output Power Supply Ground Memory Organization No Connection GND Figure 1. Functional Symbol NOTE: When the ORG pin is connected to VCC, the x16 organization is selected. When it is connected to ground, the x8 pin is selected. If the ORG pin is left unconnected, then an internal pullup device will select the x16 organization. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. © Semiconductor Components Industries, LLC, 2013 1 April, 2019 − Rev. 2 Publication Order Number: CAV93C56/D CAV93C56 Table 1. ABSOLUTE MAXIMUM RATINGS Parameters Ratings Units Storage Temperature −65 to +150 °C Voltage on Any Pin with Respect to Ground (Note 1) −0.5 to +6.5 V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. The DC input voltage on any pin should not be lower than −0.5 V or higher than VCC + 0.5 V. During transitions, the voltage on any pin may undershoot to no less than −1.5 V or overshoot to no more than VCC + 1.5 V, for periods of less than 20 ns. Table 2. RELIABILITY CHARACTERISTICS (Note 2) Symbol Parameter Min Units NEND (Note 3) Endurance 1,000,000 Program / Erase Cycles TDR Data Retention 100 Years 2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100 and JEDEC test methods. 3. Block Mode, VCC = 5 V, 25°C Table 3. D.C. OPERATING CHARACTERISTICS (VCC = +2.5 V to +5.5 V, TA=−40°C to +125°C unless otherwise specified.) Symbol Parameter Test Conditions ICC1 Power Supply Current (Write) ICC2 Power Supply Current (Read) ISB1 Power Supply Current (Standby) (x8 Mode) VCC = 5.0 V fSK = 2 MHz, VCC = 5.0 V, DO open VIN = GND or VCC, CS = GND ORG = GND ISB2 ILI ILO VIL1 VIH1 VIL2 VIH2 VOL1 VOH1 VOL2 VOH2 Power Supply Current (Standby) (x16 Mode) Input Leakage Current Output Leakage Current Input Low Voltage Input High Voltage Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Output Low Voltage Output High Voltage VIN = GND or VCC, CS = GND ORG = Float or VCC VIN = GND to VCC VOUT = GND to VCC, CS = GND 4.5 V v VCC < 5.5 V 4.5 V v VCC < 5.5 V 2.5 V v VCC < 4.5 V 2.5 V v VCC < 4.5 V 4.5 V v VCC < 5.5 V, IOL = 3 mA 4.5 V v VCC < 5.5 V, IOH = −400 mA 2.5 V v VCC < 4.5 V, IOL = 1 mA 2.5 V v VCC < 4.5 V, IOH = −100 mA Min Max Units 2 mA 500 mA 5 mA 3 mA 2 mA 2 mA −0.1 0.8 V 2 VCC + 1 V 0 VCC x 0.2 V VCC x 0.7 VCC + 1 V 0.4 V 2.4 V 0.2 V VCC − 0.2 V Table 4. PIN CAPACITANCE (TA = 25°C, f = 1 MHz, VCC = 5 V) Symbol Test Conditions Min Typ Max Units COUT (Note 4) Output Capacitance (DO) VOUT = 0 V 5 pF CIN (Note 4) Input Capacitance (CS, SK, DI, ORG) VIN = 0 V 5 pF 4. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100 and JEDEC test methods. www.onsemi.com 2 CAV93C56 Table 5. A.C. CHARACTERISTICS (Note 5) (VCC = +2.5V to +5.5V, TA = −40°C to +125°C, unless otherwise specified.) Symbol tCSS tCSH tDIS tDIH tPD1 tPD0 tHZ (Note 6) tEW tCSMIN tSKHI tSKLOW tSV SKMAX Parameter CS Setup Time CS Hold Time DI Setup Time DI Hold Time Output Delay to 1 Output Delay to 0 Output Delay to High−Z Program/Erase Pulse Width Minimum CS Low Time Minimum SK High Time Minimum SK Low Time Output Delay to Status Valid Maximum Clock Frequency Limits Min 50 0 100 100 0..


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