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UPA2731UT1A Dataheets PDF



Part Number UPA2731UT1A
Manufacturers Renesas
Logo Renesas
Description P-CHANNEL POWER MOSFET
Datasheet UPA2731UT1A DatasheetUPA2731UT1A Datasheet (PDF)

DATA SHEET MOS FIELD EFFECT TRANSISTOR μ PA2731UT1A SWITCHING P-CHANNEL POWER MOSFET DESCRIPTION The μ PA2731UT1A is P-channel MOS Field Effect Transistor designed for power management applications of notebook computers and Li-ion battery protection circuit. FEATURES • Low on-state resistance RDS(on)1 = 3.3 mΩ MAX. (VGS = −10 V, ID = −22 A) RDS(on)2 = 6.4 mΩ MAX. (VGS = −4.5 V, ID = −22 A) • Low Ciss: Ciss = 3620 pF TYP. • Small and surface mount package (8pin HVSON) 0.42 +0.1 −0.05 1.27 0..

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DATA SHEET MOS FIELD EFFECT TRANSISTOR μ PA2731UT1A SWITCHING P-CHANNEL POWER MOSFET DESCRIPTION The μ PA2731UT1A is P-channel MOS Field Effect Transistor designed for power management applications of notebook computers and Li-ion battery protection circuit. FEATURES • Low on-state resistance RDS(on)1 = 3.3 mΩ MAX. (VGS = −10 V, ID = −22 A) RDS(on)2 = 6.4 mΩ MAX. (VGS = −4.5 V, ID = −22 A) • Low Ciss: Ciss = 3620 pF TYP. • Small and surface mount package (8pin HVSON) 0.42 +0.1 −0.05 1.27 0.10 M PACKAGE DRAWING (Unit: mm) 1 2 3 4 8 7 6 5 6 ±0.2 5.4 ±0.2 5 ±0.2 5.15 ±0.2 0.10 S 0.27 ±0.05 1.0 MAX. +0.05 −0 0 ORDERING INFORMATION PART NUMBER μ PA2731UT1A-E1-AZ Note μ PA2731UT1A-E2-AZ Note PACKAGE 8pin HVSON 8pin HVSON 4.1 ±0.2 1 0.2 1, 2, 3 : Source 4 : Gate 5, 6, 7, 8: Drain Note Pb-free (This product does not contain Pb in external electrode.) 3.65 ±0.2 ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) 0.6 ±0.15 0.7 ±0.15 Drain to Source Voltage (VGS = 0 V) VDSS −30 Gate to Source Voltage (VDS = 0 V) VGSS m20 Drain Current (DC) Drain Current (pulse) Note1 Total Power Dissipation Note2 Total Power Dissipation (PW = 10 sec) Note2 ID(DC) ID(pulse) PT1 PT2 m44 m180 1.5 4.6 Channel Temperature Tch 150 Storage Temperature Single Avalanche Current Note3 Single Avalanche Energy Note3 Tstg −55 to +150 IAS −22 EAS 48 Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1% 2. Mounted on a glass epoxy board (25.4 mm x 25.4 mm x 0.8 mm) V V A A W W °C °C A mJ EQUIVALENT CIRCUIT Drain Gate Body Diode Source 3. Starting Tch = 25°C, VDD = −15 V, RG = 25 Ω, L = 100 μH, VGS = −20 → 0 V Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G17640EJ1V0DS00 (1st edition) Date Published January 2006 NS CP(K) Printed in Japan 2005 μ PA2731UT1A ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. Zero Gate Voltage Drain Current Gate Leakage Current Gate Cut-off Voltage Drain to Source On-state Resistance Note Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Note Reverse Recovery Time Reverse Recovery Charge IDSS IGSS VGS(off) RDS(on)1 RDS(on)2 Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr VDS = −30 V, VGS = 0 V VGS = m20 V, VDS = 0 V VDS = −10 V, ID = −1 mA VGS = −10 V, ID = −22 A VGS = −4.5 V, ID = −22 A VDS = −10 V VGS = 0 V f = 1 MHz VDD = −15 V, ID = −22 A VGS = −10 V RG = 10 Ω VDD = −24 V VGS = −10 V ID = −44 A IF = 44 A, VGS = 0 V IF = 44 A, VGS = 0 V di/dt = 50 A/μs −1.0 Note Pulsed TYP. 2.6 4.2 3620 1540 630 15 16 760 510 149 17 48 0.85 87 60 MAX. −1 m100 −2.5 3.3 6.4 UNIT μA nA V mΩ mΩ pF pF pF ns ns ns ns nC nC nC V ns nC TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω L PG. VGS = −20 → 0 V 50 Ω VDD − IAS BVDSS VDS ID VDD Starting Tch TEST CIRCUIT 2 SWITCHING TIME D.U.T. RG PG. VGS(−) 0 τ τ = 1 μs Duty Cycle ≤ 1% RL VDD VGS(−) VGS Wave Form 10% 0 VDS(−) 90% VDS VDS Wave Form 0 td(on) VGS 90% 90% 10% 10% tr td(off) tf ton toff TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = −2 mA PG. 50 Ω RL VDD 2 Data Sheet G17640EJ1V0DS μ PA2731UT1A TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 120 100 80 FORWARD BIAS SAFE OPERATING AREA - 1000 ID(pulse) - 100 ID(DC) PW = R VGSDS(=on)−Li10mitV)ed ID - Drain Current - A dT - Percentage of Rated Power - % 100μ1sms 10 ms P1o0w0 mers1D0isssipation 60 - 10 40 20 0 0 20 40 60 80 100 120 140 160 TA - Ambient Temperature - ˚C (at -1 TA = 25°C Single Pulse Mounted on a galass epoxy board (25.4mm × 25.4mm × 0.8mm) - 0.1 - 0.01 - 0.1 -1 - 10 VDS - Drain to Source Voltage - V - 100 Limited TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 Single pulse 100 Rth(ch−A) = 83.3°C/W rth(t) - Transient Thermal Resistance - °C/W 10 Rth(ch−C) = 1.5°C/W 1 ID - Drain Current - A - 200 0.1 Rth(ch−A) : Mounted on a glass epoxy board (25.4 mm x 25.4 mm x 0.8 mm) 0.01 100 μ 1m 10 m 100 m 1 PW - Pulse Width - s 10 100 1000 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS - 1000 ID - Drain Current - A - 150 VGS = −10 V - 100 −4.5 V - 100 - 10 -1 Tch = 150°C 75°C 25°C −55°C - 50 Pulsed 0 0 - 0.2 - 0.4 - 0.6 - 0.8 - 1 VDS - Drain to Source .


RJK0214DPA UPA2731UT1A IRF7420PbF


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