Document
NB3M8304C
3.3 V 200 MHz 1:4 LVCMOS/LVTTL Low Skew Fanout Buffer
Description The NB3M8304C is 1:4 fanout buffer with LVCMOS/LVTTL input
and output. The device supports the core supply voltage of 3.3 V (VDD pin) and output supply voltage of 2.5 V or 3.3 V (VDDO pin). The VDDO pin powers the four single ended LVCMOS/LVTTL outputs.
The NB3M8304C is Form, Fit and Function (pin to pin) compatible to ICS8304 and ICS8304I. The NB3M8304C is qualified for industrial operating temperature range.
Features
• Input Clock Frequency up to 200 MHz • Low Output to Output Skew: 45 ps max • Low Part to Part Skew: 500 ps max • Low Additive RMS Phase Jitter • Input Clock Accepts LVCMOS/ LVTTL Levels • Operating Voltage:
♦ Core Supply: VDD = 3.3 V ±5% ♦ Output Supply: VDDO = 3.3 V ±5% or 2.5 V ±5%
• Operating Temperature Range:
♦ Industrial: −40°C to +85°C
• These Devices are Pb−Free and are RoHS Compliant
www.onsemi.com
8
1 SOIC−8 D SUFFIX CASE 751
MARKING DIAGRAMS*
8
8304C ALYWG
G 1
A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of this data sheet.
Figure 1. Block Diagram
© Semiconductor Components Industries, LLC, 2014
December, 2014 − Rev. 3
1
Publication Order Number: NB3M8304C/D
NB3M8304C
Figure 2. Pin Configuration (Top View)
Table 1. PIN DESCRIPTION
Pin Number Name
1 VDDO
2 VDD
3 CLK
4 GND
5, 6, 7, 8
Q[0:3]
Type Output Power Input and Core Power LVCMOS/LVTTL Input
Ground LVCMOS/LVTTL Output
Description Clock output Supply pin. Input and Core Supply pin. Clock Input. Internally pull−down. Supply Ground. LVCMOS/LVTTL Clock output.
Table 2. MAXIMUM RATINGS
Symbol
Parameter
Condition
Min Max Unit
VDD, VDDO VI Tstg θJA
Power Supply
Input Voltage
Storage Temperature
Thermal Resistance (Junction−to−Ambient) SOIC−8
0 lfpm 500 lfpm
− −0.5 −65
4.6 VDD + 0.5
+150
80 55
V V °C °C/W
θJC Thermal Resistance (Junction to Case) (Note 1)
12−17
°C/W
Tsol MSL
Wave Solder
Moisture Sensitivity SOIC−8
3 sec
265 °C
Indefinite Time Out of Drypack (Note 2)
Level 1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. JEDEC standard multilayer board – 2S2P (2 signal, 2 power) 2. For additional information, see Application Note AND8003/D.
www.onsemi.com 2
NB3M8304C
Table 3. DC OPERATING CHARACTERISTICS (VDD = 3.3 V ±5%; TA = −40°C to +85°C)
Symbol
Parameter
Condition
Min Typ Max Unit
RIN CIN ROUT CPD VDD IIH
Input Pull−down Resistor (CLK Pin) Input Capacitance Output Impedance (Note 3) Power Dissipation Capacitance (per output) Core Supply Voltage Input High Current
VDD = VDDO = 3.465 V VIN = VDD = 3.465 V
51 kW
4 pF
5 7 12 W
15 pF
3.135 3.3 3.465
V
150 mA
IIL Input Low Current
VDD 3.465 V, VIN = 0.0 V
−0.5
mA
3. Outputs terminated with 50W to VDDO/2. See Figure 4 for supply considerations. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
Table 4. DC OPERATING CHARACTERISTICS (TA = −40°C to +85°C)
Symbol
Parameter
Condition
VDD = 3.3 V +5%, VDDO = 2.5 V +5%
VDDO
Output Supply Voltage
VOH Output HIGH Voltage
VOL Output LOW Voltage
VDD = VDDO = 3.3 V +5%
VDDO
Output Supply Voltage
VOH Output HIGH Voltage
VOL Output LOW Voltage
IOH = −100 mA IOH = −16 mA 50 W to VDDO/2 IOL = 16 mA IOL = 100 mA 50 W to VDDO/2
IOH = −16 mA IOH = −100 mA 50 W to VDDO/2 IOL = 16 mA IOL = 100 mA 50 W to VDDO/2
Min
2.375 2.2 2.1 2.1
3.135 2.9 3 2.6
Max 2.625
Unit
V V
0.25 0.2 0.5
3.465
V
V V
0.25 0.15 V 0.5
Table 5. DC OPERATING CHARACTERISTICS (TA = −40°C to +85°C; VDD = VDDO = 3.3 V ±5%; VDD = 3.3 V ±5%, VDDO = 2.5 V ±5%)
Symbol
Parameter
Condition
IDD IDDO VIH VIL
Quiescent Power Supply Current Quiescent Power Supply Current Input HIGH Voltage Input LOW Voltage
No Load No Load
Min
2 −0.3
Max 15 8 VDD + 0.3 1.3
Unit mA mA V V
www.onsemi.com 3
NB3M8304C
Table 6. AC CHARACTERISTICS (Note 4)
Symbol
Parameter
Condition
Min Typ Max Unit
TA = −405C to +855C; VDD = 3.3 V +5%, VDDO = 3.3 V +5% FIN Input Frequency tPLH Propagation Delay (Note 5)
tSKEW Output to Output Skew(Note 6) Part to Part Skew (Note 6)
Fin = 200 MHz
200 MHz
1.9 3.3 ns
25 45 ps
250 800
ps
tSKEWDC tr/tf
Output Duty Cycle (see Figure 3) Output rise and fall times (Note 7)
Fin = 200 MHz
30% to 70%, RS = 33 W, CL = 10 pF
40 250
60 % 500 ps
TA = −405C to +855C; VDD = 3.3 V +5%, VDDO = 2.5 V +5% FIN Input Frequency tPLH Propagation Delay (Note 5)
tSKEW Output to Output Skew(Note 6) Part to Part Skew (Note 6)
Fin = 200 MHz
200 MHz
2.2 3.7 ns
25 45 ps
250 500
ps
tSKEWDC tr/tf
Output Duty Cy.