System-on-Chip. LH79524 Datasheet

LH79524 System-on-Chip. Datasheet pdf. Equivalent

Part LH79524
Description System-on-Chip
Feature Preliminary data sheet LH79524/LH79525 (A.1) System-on-Chip FEATURES • Highly Integrated System-on.
Manufacture NXP
Datasheet
Download LH79524 Datasheet



LH79524
Preliminary data sheet
LH79524/LH79525 (A.1)
System-on-Chip
FEATURES
• Highly Integrated System-on-Chip
• High Performance: 76.205 MHz CPU Speed,
50.803 MHz maximum AHB clock (HCLK)
• 32-bit ARM720T™ RISC Core
– LH79524: 32-bit External Data Bus
– 208 LFBGA package
– LH79525: 16-bit External Data Bus
– 176 LQFP package
• 8 kB Cache with Write Back Buffer
• MMU (Windows CE™ Enabled)
• 16 kB On-Chip SRAM
• Flexible, Programmable Memory Interface
– SDRAM Interface
– 512 MB External Address Space
– 32-bit External Data Bus (LH79524)
– 16-bit External Data Bus (LH79525)
– SRAM/Flash/ROM Interface
– 15-bit External Address Bus
– 32-bit External Data Bus (LH79524)
– 16-bit External Data Bus (LH79525)
• Multi-stream DMA Controller
– Four 32-bit Burst-Based Data Streams
• Clock and Power Management
– 32.768 kHz Oscillator for Real Time Clock
– 10 MHz to 20 MHz Oscillator and On-chip PLL
– Active, Standby, Sleep, Stop1, and Stop2 Modes
– Externally-supplied Clock Options
• On-Chip Boot ROM
– Allows Booting from 8-, 16-, or 32-bit Devices
– NAND Flash Boot
• Low Power Modes
– Active Mode: 85 mA (MAX.)
– Standby Mode: 50 mA (MAX.)
– Sleep Mode: 3.8 mA (TYP.)
– Stop Mode 1: 420 µA (TYP.)
– Stop Mode 2: 25 µA (TYP.)
• USB Device
– Compliant with USB 2.0 Specifications (Full Speed)
– Four Endpoints
• Ethernet MAC, with MII and MDIO Interfaces
– IEEE 802.3 Compliant
– 10 and 100 Mbit/s Operation
• Analog-to-Digital Converter/Brownout Detector
– 10-bit ADC
– Pen Sense Interrupt
– Integrated Touch Screen Controller (TSC)
Preliminary data sheet
• I2C Module
• Integrated Codec Interface Support Features (I2S)
• Watchdog Timer
• Vectored Interrupt Controller
– 16 Standard and 16 Vectored IRQ Interrupts
– Interrupts Individually Configurable as IRQ or FIQ
• Three UARTs
– 16-entry FIFOs for Rx and Tx
– IrDA SIR Support on all UARTs
• Three 16-bit Timers with PWM capability
• Real Time Clock
– 32-bit Up-counter with Programmable Load
– Programmable 32-bit Match Compare Register
• Programmable General Purpose I/O Signals
– LH79524: 108 available pins on 14 ports
– LH79525: 86 available pins on 12 ports
• Programmable Color LCD Controller
– 16 (LH79524) or 12 (LH79525) Bits-per-Pixel
– Up to 800 × 600 resolution
– STN, Color STN, HR-TFT, AD-TFT, TFT
– TFT: Supports 64 k (LH79524) or 4 k (LH79525)
Direct Colors or 256 colors selected from a
Palette of 64 k Colors; 15 Shades of Gray
– Color STN: Supports 3,375 Direct Colors or 256
Colors Selected from a Palette of 3,375 Colors
• Synchronous Serial Port
– Supports Data Rates Up to 1.8452 Mbit/s
– Compatible with Common Interface Schemes
• JTAG Debug Interface and Boundary Scan
• 5 V Tolerant Digital Inputs (excludes oscillator pins)
– XTALIN and XTAL32IN pins are 1.8 V ± 10%
• On-Chip regulator allows single 3.3 V supply
DESCRIPTION
The LH79524/LH79525, powered by an ARM720T,
is a complete System-on-Chip with a high level of inte-
gration to satisfy a wide range of requirements and
applications. The SoC has a fully static design, power
management unit, and low voltage operation (1.8 V
Core, 3.3 V I/O). With the on-chip voltage regulator, a
single 3.3 V supply can be used as well. Robust periph-
erals and a low-power RISC core provide high perfor-
mance at a reasonable price.
1



LH79524
LH79524/LH79525
NXP Semiconductors
System-on-Chip
ORDERING INFORMATION
Type number
LH79524N0F100A0
LH79524N0F100A1
LH79525N0Q100A0
LH79525N0Q100A1
Table 1. Ordering information
Name
LFBGA208
LFBGA208
LQFP176
LQFP176
Package
Description
plastic low profile fine-pitch ball grid array pack-
age; 208 balls
plastic low profile fine-pitch ball grid array pack-
age; 208 balls
plastic low profile quad flat package; 176 leads;
body 20 x 20 x 1.4 mm
plastic low profile quad flat package; 176 leads;
body 20 x 20 x 1.4 mm
Version
SOT1019-1
SOT1019-1
SOT1017-1
SOT1017-1
2
Rev. 01 16 July 2007
Preliminary data sheet





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