2SK4078. K4078 Datasheet

K4078 2SK4078. Datasheet pdf. Equivalent

Part K4078
Description 2SK4078
Feature www.DataSheet4U.com DATA SHEET MOS FIELD EFFECT TRANSISTOR 2SK4078 SWITCHING N-CHANNEL POWER MOS FE.
Manufacture NEC
Datasheet
Download K4078 Datasheet



K4078
www.DataSheet4U.com
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK4078
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The 2SK4078 is N-channel MOS Field Effect Transistor designed for high current switching applications.
ORDERING INFORMATION
PART NUMBER
LEAD PLATING
2SK4078-ZK-E1-AY Note
2SK4078-ZK-E2-AY Note
Pure Sn (Tin)
PACKING
Tape 2500 p/reel
Note Pb-free (This product does not contain Pb in external electrode.)
PACKAGE
TO-252 (MP-3ZK)
typ. 0.27 g
FEATURES
Low on-state resistance
RDS(on)1 = 8.5 mΩ MAX. (VGS = 10 V, ID = 25 A)
RDS(on)2 = 14.0 mΩ MAX. (VGS = 4.5 V, ID = 13 A)
Low input capacitance
Ciss = 2300 pF TYP.
Logic level drive type
(TO-252)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
VDSS
40
Gate to Source Voltage (VDS = 0 V)
VGSS
±20
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) Note1
ID(DC)
ID(pulse)
±50
±150
Total Power Dissipation (TC = 25°C)
PT1
45
Total Power Dissipation (TA = 25°C)
PT2
1.0
Channel Temperature
Tch 150
Storage Temperature
Single Avalanche Current Note2
Single Avalanche Energy Note2
Tstg 55 to +150
IAS 23
EAS 52
V
V
A
A
W
W
°C
°C
A
mJ
Notes 1. PW 10 μs, Duty Cycle 1%
2. Starting Tch = 25°C, VDD = 20 V, RG = 25 Ω, VGS = 20 0 V, L = 100 μH
THERMAL RESISTANCE
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance
Rth(ch-C)
Rth(ch-A)
2.77
125
°C/W
°C/W
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. D18885EJ1V0DS00 (1st edition)
Date Published July 2007 NS
Printed in Japan
2007



K4078
2SK4078
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
IDSS VDS = 40 V, VGS = 0 V
Gate Leakage Current
IGSS
Gate to Source Cut-off Voltage
Forward Transfer Admittance Note
Drain to Source On-state Resistance Note
VGS(off)
| yfs |
RDS(on)1
VGS = ±20 V, VDS = 0 V
VDS = 10 V, ID = 1 mA
VDS = 10 V, ID = 25 A
VGS = 10 V, ID = 25 A
RDS(on)2
VGS = 4.5 V, ID = 13 A
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage Note
Reverse Recovery Time
Reverse Recovery Charge
Note Pulsed
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
QG
QGS
QGD
VF(S-D)
trr
Qrr
VDS = 10 V,
VGS = 0 V,
f = 1 MHz
VDD = 20 V, ID = 25 A,
VGS = 10 V,
RG = 0 Ω
VDD = 32 V,
VGS = 10 V,
ID = 50 A
IF = 50 A, VGS = 0 V
IF = 50 A, VGS = 0 V,
di/dt = 100 A/μs
MIN.
1.5
7.0
TYP.
2.0
6.3
9.5
2300
360
220
12
15
51
9
45
7
13
30
26
MAX.
1
±100
2.5
8.5
14.0
1.5
UNIT
μA
nA
V
S
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
PG.
VGS = 20 0 V
50 Ω
L
VDD
BVDSS
ID
VDD
IAS
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
RG
PG.
VGS
0
τ
τ = 1 μs
Duty Cycle 1%
RL
VDD
VGS
VGS
Wave Form
10%
0
VDS
90%
VDS
VDS
Wave Form
0
td(on)
VGS 90%
90%
10% 10%
tr td(off) tf
ton toff
D.U.T.
IG = 2 mA
PG. 50 Ω
RL
VDD
2 Data Sheet D18885EJ1V0DS





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