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XC2VP100 Dataheets PDF



Part Number XC2VP100
Manufacturers Xilinx
Logo Xilinx
Description Virtex-II Pro and Virtex-II Pro X Platform FPGAs
Datasheet XC2VP100 DatasheetXC2VP100 Datasheet (PDF)

Product Not Recommended For New Designs 1 R Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Complete Data Sheet DS083 (v5.0) June 21, 2011 0 Product Specification Module 1: Introduction and Overview 10 pages • Summary of Features • General Description • Architecture • IP Core and Reference Support • Device/Package Combinations and Maximum I/O • Ordering Information Module 2: Functional Description 60 pages • Functional Description: RocketIO™ X Multi-Gigabit Transceiver • Functional Descri.

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Product Not Recommended For New Designs 1 R Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Complete Data Sheet DS083 (v5.0) June 21, 2011 0 Product Specification Module 1: Introduction and Overview 10 pages • Summary of Features • General Description • Architecture • IP Core and Reference Support • Device/Package Combinations and Maximum I/O • Ordering Information Module 2: Functional Description 60 pages • Functional Description: RocketIO™ X Multi-Gigabit Transceiver • Functional Description: RocketIO Multi-Gigabit Transceiver • Functional Description: Processor Block • Functional Description: PowerPC™ 405 Core • Functional Description: FPGA - Input/Output Blocks (IOBs) - Digitally Controlled Impedance (DCI) - On-Chip Differential Termination - Configurable Logic Blocks (CLBs) - 3-State Buffers - CLB/Slice Configurations - 18-Kb Block SelectRAM™ Resources - 18-Bit x 18-Bit Multipliers - Global Clock Multiplexer Buffers - Digital Clock Manager (DCM) • Routing • Configuration Module 3: DC and Switching Characteristics 59 pages • Electrical Characteristics • Performance Characteristics • Switching Characteristics • Pin-to-Pin Output Parameter Guidelines • Pin-to-Pin Input Parameter Guidelines • DCM Timing Parameters • Source-Synchronous Switching Characteristics Module 4: Pinout Information 302 pages • Pin Definitions • Pinout Tables - FG256/FGG256 Wire-Bond Fine-Pitch BGA Package - FG456/FGG456 Wire-Bond Fine-Pitch BGA Package - FG676/FGG676 Wire-Bond Fine-Pitch BGA Package - FF672 Flip-Chip Fine-Pitch BGA Package - FF896 Flip-Chip Fine-Pitch BGA Package - FF1148 Flip-Chip Fine-Pitch BGA Package - FF1152 Flip-Chip Fine-Pitch BGA Package - FF1517 Flip-Chip Fine-Pitch BGA Package - FF1696 Flip-Chip Fine-Pitch BGA Package - FF1704 Flip-Chip Fine-Pitch BGA Package IMPORTANT NOTE: Page, figure, and table numbers begin at 1 for each module, and each module has its own Revision History at the end. Use the PDF "Bookmarks" pane for easy navigation in this volume. © 2000–2011 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, the Brand Window, and other designated brands included herein are trademarks of Xilinx, Inc. PowerPC is a trademark of IBM Corp. and is used under license. All other trademarks are the property of their respective owners. DS083 (v5.0) June 21, 2011 Product Specification www.xilinx.com 1 Product Not Recommended For New Designs 1 R 0 Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Introduction and Overview DS083 (v5.0) June 21, 2011 Product Specification Summary of Virtex-II Pro™ / Virtex-II Pro X Features • High-Performance Platform FPGA Solution, Including - Up to twenty RocketIO™ or RocketIO X embedded Multi-Gigabit Transceivers (MGTs) - Up to two IBM PowerPC™ RISC processor blocks • Based on Virtex-II™ Platform FPGA Technology - Flexible logic resources - SRAM-based in-system configuration - Active Interconnect technology - SelectRAM™+ memory hierarchy - Dedicated 18-bit x 18-bit multiplier blocks - Hig.


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