4 GBIT (512M x 8 BIT) CMOS NAND E2PROM
TC58BVG2S0HTA00
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
4 GBIT (512M × 8 BIT) CMOS NAND E2PROM
DESCRIP...
Description
TC58BVG2S0HTA00
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
4 GBIT (512M × 8 BIT) CMOS NAND E2PROM
DESCRIPTION
The TC58BVG2S0HTA00 is a single 3.3V 4 Gbit (4,429,185,024 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (4096 + 128) bytes × 64 pages × 2048blocks. The device has a 4224-byte static register which allows program and read data to be transferred between the register and the memory cell array in 4224-bytes increments. The Erase operation is implemented in a single block unit (256 Kbytes + 8 Kbytes: 4224 bytes × 64 pages).
The TC58BVG2S0HTA00 is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs. The Erase and Program operations are automatically executed making the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras and other systems which require high-density non-volatile memory data storage.
The TC58BVG2S0HTA00 has ECC logic on the chip and 8bit read errors for each 528Bytes can be corrected internally.
FEATURES
Organization
Memory cell array Register Page size Block size
x8
4224 × 128K × 8 4224 × 8 4224 bytes
(256K + 8K) bytes
Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Multi Page Read, Multi Page Program, Multi Block Erase, ECC Status Read
Mode control Serial input/output Command control
Number of valid blocks M...
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