TH58NVG3S0HTAI0

TH58NVG3S0HTAI0 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 8 GBIT (1G  8 BIT) CMOS NAND E2PROM DESCRIPTION The TH58NVG3S0HTAI0 is a single 3.3V 8 Gbit (9,126,805,504 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (4096  256) bytes  64 pages  4096blocks. The device has two 4352-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 4352-byte increments. The Erase operation is implemented in a single block unit (256 Kbytes  16 Kbytes: 4352 bytes  64 pages). The TH58NVG3S0HTAI0 is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs. The Erase and Program operations are automatically executed making the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras and other systems which require high-density non-volatile memory data storage. FEATURES  Organization Memory cell array Register Page size Block size x8 4352  128K  8  2 4352  8 4352 bytes (256K  16K) bytes  Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Multi Page Program, Multi Block Erase, Multi Page Copy, Multi Page Read  Mode control Serial input/output Command control  Number of valid blocks Min 4016 blocks Max 4096 blocks  Power supply VCC  2.7V to 3.6V  Access time Cell array to register 25 ...