N‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
25V
D
RDSON (MAX.)
9m...
N‐Channel Logic Level Enhancement Mode Field Effect
Transistor
Product Summary:
BVDSS
25V
D
RDSON (MAX.)
9mΩ
ID 50A G
UIS, Rg 100% Tested
S
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
EMA09N03AN
LIMITS
UNIT
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TC = 25 °C TC = 100 °C
Avalanche Current
Avalanche Energy
L = 0.1mH, ID=37.5A, RG=25Ω
Repetitive Avalanche Energy2
L = 0.05mH
Power Dissipation
TC = 25 °C TC = 100 °C
Operating Junction & Storage Temperature Range
VGS ID
IDM IAS EAS EAR PD
Tj, Tstg
±20 50 35 140 37.5 70 15 50 20 ‐55 to 150
V A
mJ W °C
100% UIS testing in condition of VD=15V, L=0.1mH, VG=10V, IL=25A, Rated VDS=25V N‐CH THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
MAXIMUM
UNIT
Junction‐to‐Case
RJC
Junction‐to‐Ambient
RJA
1Pulse width limited by maximum junction temperature. 2Duty cycle 1%
2.5 °C / W
75
2013/8/22
p.1
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
EMA09N03AN
LIMITS
UNIT
MIN TYP MAX
STATIC
Drain‐Source Breakdown Voltage Gate Threshold Voltage Gate‐Body Leakage Zero Gate Voltage Drain Current
On‐State Drain Current1 Drain‐Source On‐State Resistance1
Forward Transconductance1
V(BR)DSS VGS(th) IGSS IDSS
ID(ON) RDS(ON...