N-Channel MOSFET. NTHD4502N Datasheet

NTHD4502N MOSFET. Datasheet pdf. Equivalent


Part NTHD4502N
Description Dual Power N-Channel MOSFET
Feature NTHD4502N MOSFET – Power, Dual, N-Channel, ChipFET 30 V, 3.9 A Features • Planar Technology Device.
Manufacture ON Semiconductor
Datasheet
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NTHD4502N MOSFET – Power, Dual, N-Channel, ChipFET 30 V, 3. NTHD4502N Datasheet
Recommendation Recommendation Datasheet NTHD4502N Datasheet




NTHD4502N
NTHD4502N
MOSFET – Power, Dual,
N-Channel, ChipFET
30 V, 3.9 A
Features
Planar Technology Device Offers Low RDS(on) and Fast Switching Speed
Leadless ChipFET Package has 40% Smaller Footprint than TSOP6.
Ideal Device for Applications Where Board Space is at a Premium.
ChipFET Package Exhibits Excellent Thermal Capabilities. Ideal for
Applications Where Heat Transfer is Required.
These Devices are PbFree and are RoHS Compliant
Applications
DCDC Buck or Boost Converters
Low Side Switching
Optimized for Battery and Low Side Switching Applications in
Computing and Portable Equipment
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Unit
DraintoSource Voltage
GatetoSource Voltage
Continuous Drain
Current (Note 1)
Steady
State
Power Dissipation
(Note 1)
Continuous Drain
Current (Note 2)
Power Dissipation
(Note 2)
t5s
Steady
State
t5s
Steady
State
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 25°C
TA = 85°C
TA = 25°C
VDSS
VGS
ID
PD
ID
PD
30
±20
2.9
2.1
3.9
1.13
2.1
2.2
1.6
0.64
V
V
A
W
A
W
Pulsed Drain Current
tp = 10 ms
ESD Capability
(Note 3)
C = 100 pF,
RS = 1500 W
Operating Junction and Storage Temperature
Source Current (Body Diode)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
IDM
ESD
HBM
TJ,
TSTG
IS
TL
12
125
55 to
150
2.5
260
A
V
°C
A
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[1 oz] including traces).
2. Surface Mounted on FR4 Board using the minimum recommended pad size
(Cu area = 0.214 in sq).
3. ESD Rating Information: HBM Class 0.
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V(BR)DSS
30 V
RDS(on) TYP
80 mW @ 10 V
110 mW @ 4.5 V
ID MAX
3.9 A
D1 (7, 8)
D2 (5, 6)
G1 G2
(2) (4)
S1 (1)
NChannel MOSFET
S2 (3)
8
1
ChipFET
CASE 1206A
STYLE 2
PIN
CONNECTIONS
MARKING
DIAGRAM
D1 8
D1 7
D2 6
D2 5
1 S1
2 G1
3 S2
4 G2
1
2
3
4
8
7
6
5
C5 = Specific Device Code
M = Month Code
G = PbFree Package
ORDERING INFORMATION
Device
Package
Shipping
NTHD4502NT1G ChipFET 3000/Tape & Reel
(PbFree)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2012
May, 2019 Rev. 6
1
Publication Order Number:
NTHD4502N/D



NTHD4502N
NTHD4502N
THERMAL RESISTANCE RATINGS
Parameter
Symbol
JunctiontoAmbient – Steady State (Note 4)
RqJA
JunctiontoAmbient – t 5 s (Note 4)
RqJA
JunctiontoAmbient – Steady State (Note 5)
RqJA
JunctiontoFoot – Steady State (Note 5)
RqJF
4. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces).
5. Surface Mounted on FR4 Board using the minimum recommended pad size (Cu area = 0.214 in sq).
Max
110
60
195
40
Unit
°C/W
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min Typ Max Units
OFF CHARACTERISTICS
DraintoSource Breakdown Voltage
Zero Gate Voltage Drain Current
GatetoSource Leakage Current
ON CHARACTERISTICS (Note 6)
V(BR)DSS
IDSS
IGSS
VGS = 0 V, ID = 250 mA
VGS = 0 V, VDS = 24 V
VGS = 0 V, VDS = 24 V, TJ = 125°C
VDS = 0 V, VGS = "20 V
30
36 V
1.0 mA
10
"100
nA
Gate Threshold Voltage
DraintoSource OnResistance
Forward Transconductance
CHARGES AND CAPACITANCES
VGS(TH)
RDS(on)
gFS
VGS = VDS, ID = 250 mA
VGS = 10 V, ID = 2.9 A
VGS = 4.5 V, ID = 2.2 A
VDS = 15 V, ID = 2.9 A
1.0 1.65 3.0
78 85
105 140
3.8
V
mW
S
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
GatetoSource Charge
QGS
GatetoDrain Charge
QGD
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
GatetoSource Charge
QGS
GatetoDrain Charge
QGD
6. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
VGS = 0 V, f = 1.0 MHz,
VDS = 15 V
VGS = 0 V, f = 1.0 MHz,
VDS = 24 V
VGS
=
10
ID
V,
=
2V.9DSA=
15
V,
VGS = 4.5 V, VDS = 24 V,
ID = 2.9 A
140
53
16
135 250
42 75
13 25
3.6 7.0
0.3
0.6
0.7
1.9
0.3
0.6
0.9
pF
pF
nC
nC
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