74S253

DM74S253 Dual 3-STATE 1-of-4 Line Data Selector/Multiplexer August 1986 Revised May 2000 DM74S253 Dual 3-STATE 1-of-4 Line Data Selector/Multiplexer General Description Each of these Schottky-clamped data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR gates. Separate output control inputs are provided for each of the two four-line sections. The 3-STATE outputs can interface directly with data lines of bus-organized systems. With all but one of the common outputs disabled (at a high impedance state), the low impedance of the single enable output will drive the bus line to a HIGH or LOW logic level. Features s 3-STATE version of S153 with same pin-out s Schottky-diode-clamped transistors s Permits multiplexing from N lines to 1 line s Performs parallel-T-serial conversion s Strobe/output control s High fan-out totem-pole outputs s Typical propagation delay From data to output 6 ns From select to output 12 ns s Typical power dissipation 275 mW Ordering Code: Order Number Package Number Package Description DM74S253N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Connection Diagram Function Table Select Data Inputs Output Inputs Control B A C0 C1 C2 C3 G XXXXXX H L L LXXX L L LHXXX L L HX L XX L LHXHXX L HLXXLX L H L XXHX L HHXXX L L HHXXXH L Address inputs A and B are common to both sections. H = HIGH Level L = LOW Level X =...