HEF4511B

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4511B MSI BCD to 7-segment latch/decoder/driver Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors BCD to 7-segment latch/decoder/driver Product specification HEF4511B MSI DESCRIPTION The HEF4511B is a BCD to 7-segment latch/decoder/driver with four address inputs (DA to DD), an active LOW latch enable input (EL), an active LOW ripple blanking input (BI), an active LOW lamp test input (LT), and seven active HIGH n-p-n bipolar transistor segment outputs (Oa to Og). When EL is LOW, the state of the segment outputs (Oa to Og) is determined by the data on DA to DD. When EL goes HIGH, the last data present on DA to DD are stored in the latches and the segment outputs remain stable. When LT is LOW, all the segment outputs are HIGH independent of all other input conditions. With LT HIGH, a LOW on BI forces all segment outputs LOW. The inputs LT and BI do not affect the latch circuit. Fig.1 Functional diagram. Fig.2 Pinning diagram. HEF4511BP(N): 16-lead DIL; plastic (SOT38-1) HEF4511BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF4511BT(D): 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America PINNING DA to DD EL BI LT Oa to Og address (data) inputs latch enable input (active LOW) ripple blanking input (...