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Power-Transistor. SPD04P10PLG Datasheet

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Power-Transistor. SPD04P10PLG Datasheet






SPD04P10PLG Power-Transistor. Datasheet pdf. Equivalent




SPD04P10PLG Power-Transistor. Datasheet pdf. Equivalent





Part

SPD04P10PLG

Description

Power-Transistor



Feature


SIPMOS® Power-Transistor Features • P -Channel • Enhancement mode • Logic level • Avalanche rated • Pb-free lead plating; RoHS compliant ° Qualifi ed according to AEC Q101 Product Summa ry V DS R DS(on),max ID SPD04P10PL G - 100 V 850 mΩ -4.2 A PG-TO-252-3 Typ e Package SPD04P10PL G PG-TO252-3 Ma rking 04P10PL Lead free Yes Packing N on dry Tape and reel informatio.
Manufacture

Infineon Technologies

Datasheet
Download SPD04P10PLG Datasheet


Infineon Technologies SPD04P10PLG

SPD04P10PLG; n 1000 pcs / reel Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuou s drain current Pulsed drain current Av alanche energy, single pulse Gate sourc e voltage Power dissipation Operating a nd storage temperature ESD class I D T C=25 °C T C=100 °C I D,pulse T C=25 °C E AS I D=-4.2 A, R GS=25 Ω V GS P tot T C=25 °C T j, T st.


Infineon Technologies SPD04P10PLG

g JESD22-A114-HBM Soldering temperature IEC climatic category; DIN IEC 68-1 Value steady state -4.2 3.0 -16.8 57 ± 20 38 -55 ... 175 1A (250 V to 500 V) 2 60 °C 55/175/56 Unit A mJ V W °C Re v 1.6 page 1 2012-09-10 Parameter Th ermal characteristics Thermal resistanc e, junction - soldering point Thermal r esistance, junction - ambient Symbol C onditions SPD04P10PL.


Infineon Technologies SPD04P10PLG

G min. Values typ. Unit max. R thJC R thJA minimal footprint, steady sta te 6 cm2 cooling area1), steady state - - 3.9 K/W - 75 - 50 Electrical cha racteristics, at T j=25 °C, unless oth erwise specified Static characteristics Drain-source breakdown voltage V (BR )DSS V GS=0 V, I D=-250 mA -100 - -V Gate threshold voltage V GS(th) V DS= V GS, I D=-380 µA .

Part

SPD04P10PLG

Description

Power-Transistor



Feature


SIPMOS® Power-Transistor Features • P -Channel • Enhancement mode • Logic level • Avalanche rated • Pb-free lead plating; RoHS compliant ° Qualifi ed according to AEC Q101 Product Summa ry V DS R DS(on),max ID SPD04P10PL G - 100 V 850 mΩ -4.2 A PG-TO-252-3 Typ e Package SPD04P10PL G PG-TO252-3 Ma rking 04P10PL Lead free Yes Packing N on dry Tape and reel informatio.
Manufacture

Infineon Technologies

Datasheet
Download SPD04P10PLG Datasheet




 SPD04P10PLG
SIPMOS® Power-Transistor
Features
• P-Channel
• Enhancement mode
• Logic level
• Avalanche rated
• Pb-free lead plating; RoHS compliant
° Qualified according to AEC Q101
Product Summary
V DS
R DS(on),max
ID
SPD04P10PL G
-100 V
850 m
-4.2 A
PG-TO-252-3
Type
Package
SPD04P10PL G PG-TO252-3
Marking
04P10PL
Lead free
Yes
Packing
Non dry
Tape and reel information
1000 pcs / reel
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
Continuous drain current
Pulsed drain current
Avalanche energy, single pulse
Gate source voltage
Power dissipation
Operating and storage temperature
ESD class
I D T C=25 °C
T C=100 °C
I D,pulse T C=25 °C
E AS I D=-4.2 A, R GS=25
V GS
P tot T C=25 °C
T j, T stg
JESD22-A114-HBM
Soldering temperature
IEC climatic category; DIN IEC 68-1
Value
steady state
-4.2
3.0
-16.8
57
±20
38
-55 ... 175
1A (250 V to 500 V)
260 °C
55/175/56
Unit
A
mJ
V
W
°C
Rev 1.6
page 1
2012-09-10




 SPD04P10PLG
Parameter
Thermal characteristics
Thermal resistance,
junction - soldering point
Thermal resistance,
junction - ambient
Symbol Conditions
SPD04P10PL G
min.
Values
typ.
Unit
max.
R thJC
R thJA
minimal footprint,
steady state
6 cm2 cooling area1),
steady state
-
-
-
- 3.9 K/W
- 75
- 50
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0 V, I D=-250 mA -100
-
-V
Gate threshold voltage
V GS(th) V DS=V GS, I D=-380 µA
-1
-1.5
-2
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
I DSS
V DS=-100 V, V GS=0 V,
T j=25 °C
V DS=-100 V, V GS=0 V,
T j=150 °C
I GSS
V GS=-20 V, V DS=0 V
R DS(on)
V GS=-4.5 V, I D=-
2.75 A
-
-
-
-
-0.1 -1 µA
-10 -100
-10 -100 nA
787 1050 m
V GS=-10 V, I D=-3.0 A
-
550 850
Transconductance
g fs
|V DS|>2|I D|R DS(on)max,
I D=-3.0 A
1.5
3.0
-S
1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev 1.6
page 2
2012-09-10




 SPD04P10PLG
Parameter
Dynamic characteristics
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Gate Charge Characteristics2)
Gate to source charge
Gate to drain charge
Gate charge total
Gate plateau voltage
Reverse Diode
Diode continuous forward current
Diode pulse current
Diode forward voltage
Reverse recovery time
Reverse recovery charge
Symbol Conditions
SPD04P10PL G
min.
Values
typ.
Unit
max.
C iss
C oss
C rss
t d(on)
tr
t d(off)
tf
V GS=0 V, V DS=-25 V,
f =1 MHz
V DD=-50 V, V GS=-
10 V, I D=-4.2 A,
R G=6
-
-
-
-
-
-
-
280 372 pF
70 94
34 51
4.6 6.9 ns
5.7 8.6
18 27
5.0 7.5
Q gs
Q gd
Qg
V plateau
V DD=-80 V, I D=-4.2 A,
V GS=0 to -10 V
-
-
-
-
1.1 1.5 nC
4.6 6.9
12 16
4.1 - V
IS
I S,pulse
V SD
t rr
Q rr
T C=25 °C
V GS=0 V, I F=-4.2 A,
T j=25 °C
V R=50 V, I F=|I S|,
di F/dt =100 A/µs
- - -4.2 A
- - 16.8
- 0.94 1.2 V
- 68 85 ns
- 178 223 nC
2) See figure 16 for gate charge parameter definition
Rev 1.6
page 3
2012-09-10



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