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Receiver IC. SE4110L Datasheet

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Receiver IC. SE4110L Datasheet






SE4110L IC. Datasheet pdf. Equivalent




SE4110L IC. Datasheet pdf. Equivalent





Part

SE4110L

Description

GPS Receiver IC



Feature


SE4110L GPS Receiver IC Applications ƒ High sensitivity / low power GPS and A -GPS applications ƒ Portable navigatio n devices, mobile phones and GPS periph eral devices ƒ Telematics equipment Fe atures ƒ Single-conversion L1-band GPS radio with integrated IF filter ƒ Int egrated LNA; 1.6 dB typ. noise figure Low RF system noise figure; 2.3 dB ty p. ƒ Low 10 mA operating.
Manufacture

SiGe Semiconductor

Datasheet
Download SE4110L Datasheet


SiGe Semiconductor SE4110L

SE4110L; current with 2.7-3.3 V supply; 8 mA wit h internal LNA disabled ƒ Standby curr ent <10 µA ƒ Fully Integrated PLL, co mpatible with 13, 16.368, 19.5 and 26 M Hz reference frequencies ƒ 2-bit SIGN & MAG Digital IF output ƒ Integrated V CO and resonator ƒ I/O supply range ex tends down to 1.7 V ƒ 4 x 4 mm 24 pin QFN ƒ Pb-free, RoHS compliant and Halo gen-free Ordering Informa.


SiGe Semiconductor SE4110L

tion Part No. Package Remark SE4110L -R 24 Pin QFN Shipped in Tape & Reel P roduct Description The SE4110L is a hig hly integrated GPS receiver offering hi gh performance and low-power operation in a wide range of low-cost application s. It is particularly well-suited to mo bile phone and high sensitivity L1-band GPS and A-GPS systems. The SE4110L inc ludes an on-chip L.


SiGe Semiconductor SE4110L

NA and a low IF receiver with a linear A GC and 2-bit analogue-to-digital conver ter (ADC). The receiver incorporates a fully integrated image reject mixer so no SAW filter is required in many appli cations. There is also an on-chip IF fi lter. The SE4110L supports a wide range of reference frequencies, addressing b oth traditional GPS systems and emergin g mobile phone app.

Part

SE4110L

Description

GPS Receiver IC



Feature


SE4110L GPS Receiver IC Applications ƒ High sensitivity / low power GPS and A -GPS applications ƒ Portable navigatio n devices, mobile phones and GPS periph eral devices ƒ Telematics equipment Fe atures ƒ Single-conversion L1-band GPS radio with integrated IF filter ƒ Int egrated LNA; 1.6 dB typ. noise figure Low RF system noise figure; 2.3 dB ty p. ƒ Low 10 mA operating.
Manufacture

SiGe Semiconductor

Datasheet
Download SE4110L Datasheet




 SE4110L
SE4110L
GPS Receiver IC
Applications
ƒ High sensitivity / low power GPS and A-GPS
applications
ƒ Portable navigation devices, mobile phones and
GPS peripheral devices
ƒ Telematics equipment
Features
ƒ Single-conversion L1-band GPS radio with
integrated IF filter
ƒ Integrated LNA; 1.6 dB typ. noise figure
ƒ Low RF system noise figure; 2.3 dB typ.
ƒ Low 10 mA operating current with 2.7-3.3 V supply;
8 mA with internal LNA disabled
ƒ Standby current <10 µA
ƒ Fully Integrated PLL, compatible with 13, 16.368,
19.5 and 26 MHz reference frequencies
ƒ 2-bit SIGN & MAG Digital IF output
ƒ Integrated VCO and resonator
ƒ I/O supply range extends down to 1.7 V
ƒ 4 x 4 mm 24 pin QFN
ƒ Pb-free, RoHS compliant and Halogen-free
Ordering Information
Part No.
Package
Remark
SE4110L-R 24 Pin QFN Shipped in Tape & Reel
Product Description
The SE4110L is a highly integrated GPS receiver
offering high performance and low-power operation in a
wide range of low-cost applications. It is particularly
well-suited to mobile phone and high sensitivity L1-band
GPS and A-GPS systems.
The SE4110L includes an on-chip LNA and a low IF
receiver with a linear AGC and 2-bit analogue-to-digital
converter (ADC). The receiver incorporates a fully
integrated image reject mixer so no SAW filter is
required in many applications. There is also an on-chip
IF filter.
The SE4110L supports a wide range of reference
frequencies, addressing both traditional GPS systems
and emerging mobile phone applications. The
synthesizer is highly integrated requiring only two
passive components to implement an off-chip loop filter.
The SE4110L is optimized for the lowest possible
power consumption consistent with the very low
external component count.
The SE4110L incorporates current-controlled low-
spurious output buffers which may optionally be run
from a separate external supply to interface to low
voltage systems. The buffers supply sufficient current to
drive most baseband devices directly.
Functional Block Diagram
Optional
filter
LNA_OUT
MIX_IN
VAGC
LNA_IN
Buffer
LNA
IF Filter
~~~
-45°
+45°
AGC
Controller
ADC
IQ
SE4110
Quadrature
y2
VCO
~
Feedback
Divider
Phase/Frequency
Detector
Clock
select
Reference
Divider
Chip
control
VTUNE
~ Reference
Oscillator
/ Buffer
PLL Loop
Filter
XTAL1
XTAL2
AGC_DIS
MAG
SIGN
CLK_OUT
FREF2
FREF1
FREF0
RX_EN
OSC_EN
RVI
DST-00002 ƒ Rev 6.4 ƒ May-26-2009
1 of 22




 SE4110L
Pin Out Diagram
SE4110L
GPS Receiver IC
VCC_LNA 1
VCC_AGC 2
LNA_IN 3
VDD_FSE 4
VAGC 5
AGC_DIS 6
SE4110L
Top View
18 VTUNE
17 VDDQ
16 XTAL2
15 XTAL1
14 FREF2
13 FREF1
VTUNE 18
VDDQ 17
XTAL2 16
XTAL1 15
FREF2 14
FREF1 13
SE4110L
Bottom View
Die Pad
1 VCC_LNA
2 VCC_AGC
3 LNA_IN
4 VDD_FSE
5 VAGC
6 AGC_DIS
DST-00002 ƒ Rev 6.4 ƒ May-26-2009
2 of 22




 SE4110L
SE4110L
GPS Receiver IC
Pin Out Description
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Name
Description
Connection
VCC_LNA
VCC_AGC
LNA_IN
VDD_FSE
VAGC
AGC_DIS
VSSN
VDDN
CLK_OUT
SIGN
MAG
FREF0
FREF1
FREF2
XTAL1
XTAL2
VDDQ
VTUNE
Analogue Power supply for LNA
Connect to VCC via dedicated
decoupling network to enable LNA
Connect to GND to disable LNA
Analogue Power supply for AGC
Connect to VCC
LNA RF input
DC blocking capacitor required
Connect to matching network in a
compact RF layout
Power supply for configuration logic
Connect to VCC
AGC filter capacitor
Single capacitor to GND
(Pin also allows external control of
AGC when AGC_DIS = ‘1’)
AGC Inhibit input
AGC Gain hold (Connect to VDD)
or
Enable AGC (Connect to VSSN / GND)
Ground return for digital interface
Connect to GND, or digital ground for
baseband IC
Digital Power supply for digital interface
Connect to VDD, or digital supply for
baseband IC
Sample clock output
ADC Sample Clock output to baseband
IC, at VDDN logic levels
SIGN output data
ADC SIGN output to baseband IC, at
VDDN logic levels
MAG output data
ADC MAG output to baseband IC, at
VDDN logic levels
Frequency Reference select pin (bit 0)
Frequency Reference select pin (bit 1)
Frequency Reference select pin (bit 2)
Select desired Reference / IF /
CLK_OUT frequency plan as per
“FREF Hardware Configuration” Table
(Connect to RX_EN or VSSN / GND as
required)
Crystal / TCXO connection
If using TCXO reference source:
Connect to AC coupled TCXO
reference signal
If using Crystal reference source:
Connect one lead of Crystal to Crystal
input 1 (XTAL1)
Crystal Connection
If using TCXO reference source:
Leave unconnected
If using Crystal reference source:
Connect other lead of Crystal to Crystal
input 2 (XTAL2)
Power supply for quiet digital circuits
Connect to VCC
VCO tuning voltage input / PLL Phase-
detector output
Connect to PLL Loop Filter network
DST-00002 ƒ Rev 6.4 ƒ May-26-2009
3 of 22



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