ARM Microcontroller. MB9BF324K Datasheet

MB9BF324K Microcontroller. Datasheet pdf. Equivalent


Fujitsu MB9BF324K
FUJITSU SEMICONDUCTOR
DATA SHEET
DS706-00049-1v0-E
32-bit ARMTM CortexTM-M3 based Microcontroller
MB9B320M Series
MB9BF324K/L/M, MB9BF322K/L/M,
MB9BF321K/L/M
DESCRIPTION
The MB9B320M Series are highly integrated 32-bit microcontrollers dedicated for embedded controllers
with low-power consumption mode and competitive cost.
These series are based on the ARM Cortex-M3 Processor with on-chip Flash memory and SRAM, and have
peripheral functions such as various timers, ADCs, DACs and Communication Interfaces (USB, UART,
CSIO, I2C, LIN).
The products which are described in this data sheet are placed into TYPE9 product categories in "FM3
Family PERIPHERAL MANUAL".
Note: ARM and Cortex are the trademarks of ARM Limited in the EU and other countries.
Copyright©2012 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2012.12


MB9BF324K Datasheet
Recommendation MB9BF324K Datasheet
Part MB9BF324K
Description 32-bit ARM Microcontroller
Feature MB9BF324K; FUJITSU SEMICONDUCTOR DATA SHEET DS706-00049-1v0-E 32-bit ARMTM CortexTM-M3 based Microcontroller .
Manufacture Fujitsu
Datasheet
Download MB9BF324K Datasheet




Fujitsu MB9BF324K
MB9B320M Series
FEATURES
32-bit ARM Cortex-M3 Core
Processor version: r2p1
Up to 72 MHz Frequency Operation
Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and
48 peripheral interrupts and 16 priority levels
24-bit System timer (Sys Tick): System timer for OS task management
On-chip Memories
[Flash memory]
Dual operation Flash memory
Main area: Up to 256 Kbytes
Work area: 32 Kbytes
Read cycle: 0 wait-cycle
Security function for code protection
[SRAM]
This Series on-chip SRAM is composed of two independent SRAM (SRAM0, SRAM1). SRAM0 is
connected to I-code bus or D-code bus of Cortex-M3 core. SRAM1 is connected to System bus.
SRAM0: Up to 16 Kbytes
SRAM1: Up to 16 Kbytes
USB Interface
The USB interface is composed of Function and Host.
[USB function]
USB2.0 Full-Speed supported
Max 6 EndPoint supported
EndPoint 0 is control transfer
EndPoint 1, 2 can select Bulk-transfer, Interrupt-transfer or Isochronous-transfer
EndPoint 3 to 5 can select Bulk-transfer or Interrupt-transfer
EndPoint 1 to 5 are comprised of Double Buffers.
[USB host]
USB2.0 Full/Low-speed supported
Bulk-transfer, interrupt-transfer and Isochronous-transfer support
USB Device connected/dis-connected automatic detection
Automatic processing of the IN/OUT token handshake packet
Max 256-byte packet-length supported
Wake-up function supported
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Fujitsu MB9BF324K
MB9B320M Series
Multi-function Serial Interface (Max 8channels)
4 channels with 16steps×9-bit FIFO (ch.0/1/3/4), 4 channels without FIFO (ch.2/5/6/7)
Operation mode is selectable from the followings for each channel.
UART
CSIO
LIN
I2C
[UART]
Full duplex double buffer
Selection with or without parity supported
Built-in dedicated baud rate generator
External clock available as a serial clock
Hardware Flow control : Automatically control the transmission/reception by CTS/RTS (only ch.4)
Various error detection functions available (parity errors, framing errors, and overrun errors)
[CSIO]
Full duplex double buffer
Built-in dedicated baud rate generator
Overrun error detection function available
[LIN]
LIN protocol Rev.2.1 supported
Full duplex double buffer
Master/Slave mode supported
LIN break field generation (can be changed to 13 to 16-bit length)
LIN break delimiter generation (can be changed to 1 to 4-bit length)
Various error detection functions available (parity errors, framing errors, and overrun errors)
[I2C]
Standard mode (Max 100kbps) / High-speed mode (Max 400kbps) supported
DMA Controller (8channels)
The DMA Controller has an independent bus from the CPU, so CPU and DMA Controller can process
simultaneously.
8 independently configured and operated channels
Transfer can be started by software or request from the built-in peripherals
Transfer address area: 32-bit (4 Gbytes)
Transfer mode: Block transfer/Burst transfer/Demand transfer
Transfer data type: byte/half-word/word
Transfer block count: 1 to 16
Number of transfers: 1 to 65536
A/D Converter (Max 26channels)
[12-bit A/D Converter]
Successive Approximation type
Built-in 2units
Conversion time: 0.8μs @ 5V
Priority conversion available (priority at 2levels)
Scanning conversion mode
Built-in FIFO for conversion data storage (for SCAN conversion: 16steps, for Priority conversion:
4steps)
D/A Converter (Max 2channels)
R-2R type
10-bit resolution
DS706-00049-1v0-E
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