Document
STP4NK50Z - STP4NK50ZFP STD4NK50Z - STD4NK50Z-1
N-CHANNEL 500V - 2.4Ω - 3A TO-220/TO-220FP/DPAK/IPAK Zener-Protected SuperMESH™Power MOSFET
TYPE
VDSS RDS(on)
ID
Pw
STP4NK50Z STP4NK50ZFP STD4NK50Z STD4NK50Z-1
500 V < 2.7 Ω 3 A 45 W 500 V < 2.7 Ω 3 A 20 W 500 V < 2.7 Ω 3 A 45 W 500 V < 2.7 Ω 3 A 45 W
s TYPICAL RDS(on) = 2.3 Ω s EXTREMELY HIGH dv/dt CAPABILITY s 100% AVALANCHE TESTED s GATE CHARGE MINIMIZED s VERY LOW INTRINSIC CAPACITANCES s VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperMESH™ series is obtained through an extreme optimization of ST’s well established stripbased PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products.
TO-220
3 1 DPAK
3 2 1
TO-220FP
IPAK
3
2 1
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC s LIGHTING
ORDERING INFORMATION
SALES TYPE
MARKING
STP4NK50Z
P4NK50Z
STP4NK50ZFP
P4NK50ZFP
STD4NK50ZT4
D4NK50Z
STD4NK50Z-1
D4NK50Z
December 2002
PACKAGE TO-220
TO-220FP DPAK IPAK
PACKAGING TUBE TUBE
TAPE & REEL TUBE
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STP4NK50Z - STP4NK50ZFP - STD4NK50Z - STD4NK50Z-1
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 kΩ)
VGS Gate- source Voltage
ID Drain Current (continuous) at TC = 25°C
ID Drain Current (continuous) at TC = 100°C
IDM ( ) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ)
dv/dt (1) Peak Diode Recovery voltage slope
VISO
Insulation Withstand Voltage (DC)
Tj Operating Junction Temperature Tstg Storage Temperature
( ) Pulse width limited by safe operating area (1) ISD ≤3 A, di/dt ≤200A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX. (*) Limited only by maximum temperature allowed
STP4NK50Z
3 1.9 12 45 0.36
-
Value
STP4NK50ZFP
500 500 ± 30 3 (*) 1.9 (*) 12 (*) 20 0.16 2800 4.5 2500
STD4NK50Z STD4NK50Z-1
3 (*) 1.9 (*) 12 (*)
45 0.36
-
-55 to 150
THERMAL DATA
Rthj-case Rthj-amb
Tl
Thermal Resistance Junction-case (Max) Thermal Resistance Junction-ambient (Max) Maximum Lead Temperature For Soldering Purpose
TO-220 TO-220FP
2.78 6.25 62.5 300
DPAK IPAK
2.78
100
Unit
V V V A A A W W/°C V V/ns V °C
°C/W °C/W
°C
AVALANCHE CHARACTERISTICS
Symbol
Parameter
IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max)
EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V)
Max Value 3
120
Unit A
mJ
GATE-SOURCE ZENER DIODE
Symbol
Parameter
BVGSO
Gate-Source Breakdown Voltage
Test Conditions Igs=± 1mA (Open Drain)
Min. 30
Typ.
Max.
Unit V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components.
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STP4NK50Z - STP4NK50ZFP - STD4NK50Z - STD4NK50Z-1
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF
Symbol
Parameter
Test Conditions
Min. Typ. Max.
V(BR)DSS Drain-source Breakdown Voltage
ID = 1 mA, VGS = 0
500
IDSS
Zero Gate Voltage Drain Current (VGS = 0)
VDS = Max Rating VDS = Max Rating, TC = 125 °C
1 50
IGSS
Gate-body Leakage Current (VDS = 0)
VGS = ± 20V
±10
VGS(th) Gate Threshold Voltage
VDS = VGS, ID = 50µA
3 3.75 4.5
RDS(on)
Static Drain-source On Resistance
VGS = 10V, ID = 1.5 A
2.3 2.7
DYNAMIC
Symbol
Parameter
gfs (1) Forward Transconductance
Ciss Coss Crss
Input Capacitance Output Capacitance Reverse Transfer Capacitance
Coss eq. (3) Equivalent Output Capacitance
SWITCHING ON
Symbol
Parameter
td(on) tr
Turn-on Delay Time Rise Time
Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge
Test Conditions VDS = 15 V, ID = 1.5 A VDS = 25V, f = 1 MHz, VGS = 0
Min.
VGS = 0V, VDS = 0V to 400V
Test Conditions
VDD = 250 V, ID = 1.5 A RG = 4.7Ω VGS = 10 V (Resistive Load see, Figure 3)
VDD = 400 V, ID = 3 A, VGS = 10 V
Min.
Typ. 1.5 310 49 10
33
Typ. 10 7
12 3 7
Max. Max.
SWITCHING OFF
Symbol
Parameter
td(off) tf
Turn-off Delay Time Fall Time
tr(Voff) tf tc
Off-voltage Rise Time Fall Time Cross-over Time
Test Conditions
VDD = 250 V, ID = 1.5 A RG = 4.7Ω VGS = 10 V (Resistive Load see, Figure 3)
VDD = 400V, ID = 3 A, RG = 4.7Ω, VGS = 10V (Inductive Load see, Figure 5)
Min.
Typ. 21 11
10 10 17
Max.
Unit V
µA µA µA
V Ω
Unit S pF pF pF
pF
Unit ns ns
nC nC nC
Unit ns ns
ns ns ns
SOURCE DRAIN DIODE
Symbol
Parameter
Test Con.