Document
OptiMOS®-T Power-Transistor
Features • N-channel - Enhancement mode • Automotive AEC Q101 qualified • MSL1 up to 260°C peak reflow • 175°C operating temperature • Green package (RoHS compliant) • Ultra low Rds(on) • 100% Avalanche tested
IPB80N04S3-03 IPI80N04S3-03, IPP80N04S3-03
Product Summary V DS R DS(on),max (SMD version) ID
40 V 3.2 mΩ 80 A
PG-TO263-3-2 PG-TO262-3-1 PG-TO220-3-1
Type IPB80N04S3-03 IPI80N04S3-03 IPP80N04S3-03
Package PG-TO263-3-2 PG-TO262-3-1 PG-TO220-3-1
Marking 3N0403 3N0403 3N0403
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol
Conditions
Continuous drain current1)
I D T C=25 °C, V GS=10 V
T C=100 °C, V GS=10 V2)
Pulsed drain current2)
I D,pulse T C=25 °C
Avalanche energy, single pulse
E AS I D=80 A
Gate source voltage
V GS
Power dissipation
P tot T C=25 °C
Operating and storage temperature T j, T stg
IEC climatic category; DIN IEC 68-1
Value 80
80
320 526 ±20 188 -55 ... +175 55/175/56
Unit A
mJ V W °C
Rev. 1.0
page 1
2007-05-03
IPB80N04S3-03 IPI80N04S3-03, IPP80N04S3-03
Parameter
Symbol
Conditions
min.
Values typ.
Unit max.
Thermal characteristics2)
Thermal resistance, junction - case R thJC
Thermal resistance, junction ambient, leaded
R thJA
- - 0.8 K/W - - 62
SMD version, device on PCB
R thJA
minimal footprint 6 cm2 cooling area3)
-
- 62 - 40
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0 V, I D= 1 mA
40
-
-V
Gate threshold voltage
V GS(th) V DS=V GS, I D=120 µA
2.1
3.0
4.0
Zero gate voltage drain current
I DSS
V DS=40 V, V GS=0 V, T j=25 °C
-
-
1 µA
Gate-source leakage current
I GSS
V DS=40 V, V GS=0 V, T j=125 °C2)
V GS=20 V, V DS=0 V
-
- 100 - 100 nA
Drain-source on-state resistance
RDS(on) V GS=10 V, I D=80 A
- 2.8 3.5 mΩ
V GS=10 V, I D=80 A, SMD version
-
2.5 3.2
Rev. 1.0
page 2
2007-05-03
Parameter
Dynamic characteristics2) Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time
Gate Charge Characteristics2) Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage
Reverse Diode Diode continous forward current2) Diode pulse current2)
Diode forward voltage
Reverse recovery time2)
Symbol
Conditions
IPB80N04S3-03 IPI80N04S3-03, IPP80N04S3-03
min.
Values typ.
Unit max.
C iss C oss Crss t d(on) tr t d(off) tf
V GS=0 V, V DS=25 V, f =1 MHz
V DD=20 V, V GS=10 V, I D=80 A, R G=3.5 Ω
-
5600 1540 240
25 17 39 14
7300 pF 2000 350
- ns -
Q gs - 30 40 nC
Q gd V DD=32 V, I D=80 A, Q g V GS=0 to 10 V
-
20 35 83 110
V plateau
- 5.4 - V
IS I S,pulse
V SD
T C=25 °C
V GS=0 V, I F=80 A, T j=25 °C
t rr
V R=20 V, I F=I S, di F/dt =100 A/µs
- - 80 A - - 320 - 1 1.3 V
- 46 - ns
Reverse recovery charge2)
Q rr
- 73 - nC
1) Current is limited by bondwire; with an R thJC = 0.8K/W the chip is able to carry 182A at 25°C. For detailed information see Application Note ANPS071E at www.infineon.com/optimos
2) Defined by design. Not subject to production test.
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air.
Rev. 1.0
page 3
2007-05-03
1 Power dissipation P tot = f(T C); V GS ≥ 6 V
IPB80N04S3-03 IPI80N04S3-03, IPP80N04S3-03
2 Drain current I D = f(T C); V GS ≥ 6 V
P tot [W] I D [A]
200 180 160 140 120 100
80 60 40 20
0 0 50 100 150 T C [°C]
3 Safe operating area I D = f(V DS); T C = 25 °C; D = 0; SMD parameter: t p
1000
100
80
60
40
20
0 200 0 50 100 150
T C [°C] 4 Max. transient thermal impedance Z thJC = f(t p) parameter: D =t p/T
101
100
1 µs 10 µs 100 µs
1 ms
100
0.5
10-1
0.1 0.05
I D [A] Z thJC [K/W]
10 0.01 10-2
200
1 0.1
1 10 V DS [V]
100
single pulse
10-3 10-6
10-5
10-4
10-3
10-2
10-1
100
t p [s]
Rev. 1.0
page 4
2007-05-03
I D [A] R DS(on) [mΩ]
5 Typ. output characteristics I D = f(V DS); T j = 25 °C; SMD parameter: V GS
320
10 V
7V
280
240
200
160
120
80
40
0 024 V DS [V]
7 Typ. transfer characteristics I D = f(V GS); V DS = 6V parameter: T j
320
280
240
200
IPB80N04S3-03 IPI80N04S3-03, IPP80N04S3-03
6 Typ. drain-source on-state resistance R DS(on) = f(I D); T j = 25 °C; SMD parameter: V GS
20
5V
18
5.5 V
6V
6.5 V
6.5 V
16
14
12
6V
10
5.5 V
8 6
7V
5V 4
10 V
2
68
0 80 160 240 320 I D [A]
8 Typ. drain-source on-state resistance R DS(on) = f(T j); I D = 80 A; V GS = 10 V; SMD
-55 °C
5
25 °C 175 °C
4
I D [A] R DS(on) [mΩ]
160 3 120
80 2 40
0 2345678 V GS [V]
1
-60 -20
20
60 100 140 180
T j [°C]
Rev. 1.0
page 5
2007-05-03
9 Typ. gate threshold voltage V GS(th) = f(T j); V GS = V DS parameter: I D
4
3.5
3 1200 µA
120 µA
2.5
IPB80N04S3-03 IPI80N04S3-03, IPP80N04S3-03
10 Typ. capacitances C = f(V DS); V GS = 0 V; f = 1 MHz
104
Ciss
Coss
103
V GS(th) [V] C [pF]
2
1.5 Crss
1 -60 -20 20 60 100 140 180 T j [°C]
102.