Document
8XC152JA JB JC JD UNIVERSAL COMMUNICATION CONTROLLER
8-BIT MICROCONTROLLER
X 8K Factory Mask Programmable ROM Available
Y Superset of 80C51 Architecture
Y Multi-Protocol Serial Communication I O Port (2 048 Mbps 2 4 Mbps Max) SDLC HDLC Only CSMA CD and SDLC HDLC User Definable Protocols
Y Full Duplex Half Duplex
Y MCS -51 Compatible UART
Y 16 5 MHz Maximum Clock Frequency
Y Multiple Power Conservation Modes
Y 64KB Program Memory Addressing
Y 64KB Data Memory Addressing Y 256 Bytes On-Chip RAM Y Dual On-Chip DMA Channels Y Hold Hold Acknowledge Y Two General Purpose Timer Counters Y 5 or 7 I O Ports Y 56 Special Function Registers Y 11 Interrupt Sources Y Available in 48 Pin Dual-in-Line Package
and 68 Pin Surface Mount PLCC Package
(See Packaging Spec Order 231369)
The 80C152 which is based on the MCS -51 CPU is a highly integrated single-chip 8-bit microcontroller designed for cost-sensitive high-speed serial communications It is well suited for implementing Integrated Services Digital Networks (ISDN) emerging Local Area Networks and user defined serial backplane applications In addition to the multi-protocol communication capability the 80C152 offers traditional microcontroller features for peripheral I O interface and control
Silicon implementations are much more cost effective than multi-wire cables found in board level parallel-toserial and serial-to-parallel converters The 83C152 contains in silicon all the features needed for the serialto-parallel conversion Other 83C152 benefits include 1) better noise immunity through differential signaling or fiber optic connections 2) data integrity utilizing the standard designed in CRC checks and 3) better modularity of hardware and software designs All of these cost network parameter and real estate improvements apply to 83C152 serial links between boards or systems and 83C152 serial links on a single board
Other brands and names are the property of their respective owners Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
October 1989
Order Number 270431-003
8XC152JA JB JC JD
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Figure 1 Connection Diagrams
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8XC152JA JB JC JD
On 80C152JB JD Only
Figure 2 Block Diagram
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8XC152JA JB JC JD
80C152JB JD General Description
The 80C152JB JD is a ROMless extension of the 80C152 Universal Communication controller The 80C152JB has the same five 8-bit I O ports of the 80C152 plus an additional two 8-bit I O ports Port 5 and Port 6 The 80C152JB JD also has two additional control pins EBEN (EPROM Bus ENable) and EPSEN (.