Document
BUK7520-55A; BUK7620-55A
TrenchMOS™ standard level FET
Rev. 01 — 18 January 2001
Product specification
1. Description
N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOS™ technology, featuring very low on-state resistance.
Product availability: BUK7520-55A in SOT78 (TO-220AB) BUK7620-55A in SOT404 (D 2-PAK).
2. Features
s TrenchMOS™ technology s Q101 compliant s 175 °C rated s Standard level compatible.
3. Applications
s Automotive and general purpose power switching:
c
c x 12 V and 24 V loads x Motors, lamps and solenoids.
4. Pinning information
Table 1: Pinning - SOT78, SOT404, simplified outline and symbol
Pin Description
Simplified outline
1 gate (g) 2 drain (d)
mb
3 source (s)
mb mounting base; connected to drain (d)
mb
MBK106
123
SOT78 (TO-220AB)
2 1 3 MBK116
SOT404 (D2-PAK)
Symbol
d
g
MBB076
s
Philips Semiconductors
BUK7520-55A; BUK7620-55A
TrenchMOS™ standard level FET
5. Quick reference data
Table 2: Quick reference data
Symbol Parameter
VDS ID Ptot Tj RDSon
drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance
6. Limiting values
Conditions
Tmb = 25 °C; VGS = 10 V Tmb = 25 °C
VGS = 10 V; ID = 25 A Tj = 25 °C Tj = 175 °C
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VDS VDGR VGS ID
drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC)
RGS = 20 kΩ
Tmb = 25 °C; VGS = 10 V; Figure 2 and 3
IDM peak drain current
Tmb = 100 °C; VGS = 10 V; Figure 2
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3
Ptot total power dissipation Tstg storage temperature Tj operating junction temperature Source-drain diode
Tmb = 25 °C; Figure 1
IDR reverse drain current (DC)
IDRM
pulsed reverse drain current
Avalanche ruggedness
Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs
WDSS non-repetitive avalanche energy
unclamped inductive load; ID = 48 A; VDS ≤ 55 V; VGS = 10 V; RGS = 50 Ω; starting Tmb = 25 °C
Typ Max Unit − 55 V − 54 A − 118 W − 175 °C
17 20 mΩ − 40 mΩ
Min Max Unit − 55 V − 55 V − ±20 V − 54 A
− 38 A − 217 A
− 118 W −55 +175 °C −55 +175 °C
− 54 A − 217 A
− 115 mJ
9397 750 07751
Product specification
Rev. 01 — 18 January 2001
© Philips Electronics N.V. 2001. All rights reserved.
2 of 15
Philips Semiconductors
BUK7520-55A; BUK7620-55A
TrenchMOS™ standard level FET
120
Pder (%) 100
03na19
80
60
40
20
0 0 25 50 75 100 125 150 175 200 Tmb (oC)
Pder
=
-------P----t--o--t------P
×
100
%
t o t ( 25 °C )
Fig 1. Normalized total power dissipation as a function of mounting base temperature.
120 Ider (%)
100
03aa24
80
60
40
20
0
0 25 50 75 100 125 150 175 200 Tmb (oC)
VGS ≥ 4.5 V Ider = -I------I---D-------- × 100%
D ( 25 °C )
Fig 2. Normalized continuous drain current as a function of mounting base temperature.
103 03nc66 ID (A)
RDSon = VDS/ ID 102
tp = 10 us
10 P
δ
=
tp T
tp T.