Audio Amplifier. SSM2301 Datasheet

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SSM2301 Datasheet
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Part SSM2301
Description Filterless High Efficiency Mono 1.4 W Class-D Audio Amplifier
Feature SSM2301; Filterless High Efficiency Mono 1.4 W Class-D Audio Amplifier SSM2301 FEATURES Filterless Class-D a.
Manufacture Analog Devices
Datasheet
Download SSM2301 Datasheet




Analog Devices SSM2301
Filterless High Efficiency
Mono 1.4 W Class-D Audio Amplifier
SSM2301
FEATURES
Filterless Class-D amplifier with Σ-Δ modulation
No sync necessary when using multiple Class-D amplifiers
from Analog Devices, Inc.
1.4 W into 8 Ω at 5.0 V supply with less than 1% THD + N
85% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
Greater than 98 dB SNR (signal-to-noise ratio)
Single-supply operation from 2.5 V to 5.0 V
20 nA ultralow shutdown current
Short-circuit and thermal protection
Available in 8-lead, 3 mm × 3 mm LFCSP and MSOP packages
Pop-and-click suppression
Built-in resistors reduce board component count
Fixed and user-adjustable gain configurations
APPLICATIONS
Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys
GENERAL DESCRIPTION
The SSM2301 is a fully integrated, high efficiency, Class-D audio
amplifier designed to maximize performance for mobile phone
applications. The application circuit requires a minimum of
external components and operates from a single 2.5 V to 5.0 V
supply. It is capable of delivering 1.4 W of continuous output
power with less than 1% THD + N driving an 8 Ω load from
a 5.0 V supply.
The SSM2301 features a high efficiency, low noise modulation
scheme that does not require external LC output filters. The modu-
lation provides high efficiency even at low output power.
The SSM2301 operates with 85% efficiency at 1.4 W into 8 Ω
from a 5.0 V supply and has a signal-to-noise ratio (SNR) that
is greater than 98 dB. Spread-spectrum modulation is used to
provide lower EMI-radiated emissions compared with other
Class-D architectures.
The SSM2301 has a micropower shutdown mode with a maximum
shutdown current of 30 nA. Shutdown is enabled by applying
a logic low to the SD pin.
The device also includes pop-and-click suppression circuitry.
This minimizes voltage glitches at the output during turn-on
and turn-off, thus reducing audible noise on activation and
deactivation.
The fully differential input of the SSM2301 provides excellent
rejection of common-mode noise on the input. Input coupling
capacitors can be omitted if the dc input common-mode voltage
is approximately VDD/2.
The SSM2301 also has excellent rejection of power supply noise,
including noise caused by GSM transmission bursts and RF
rectification. PSRR is typically 63 dB at 217 Hz.
The gain can be set to 6 dB or 12 dB by utilizing the gain control
select pin connected respectively to ground or to VDD. Gain
can also be adjusted externally by inserting a resistor in series
with each input pin.
The SSM2301 is specified over the commercial temperature range
(−40°C to +85°C). It has built-in thermal shutdown and output
short-circuit protection. It is available in both an 8-lead, 3 mm ×
3 mm lead-frame chip scale package (LFCSP) and an 8-lead
MSOP package.
FUNCTIONAL BLOCK DIAGRAM
10µF
0.1µF
VBATT
2.5V TO 5.0V
0.01µF1
AUDIO IN+
AUDIO IN–
0.01µF1
SSM2301
IN+
GAIN
IN– CONTROL
GAIN
VDD
MODULATOR
FET
DRIVER
OUT+
OUT–
SHUTDOWN
SD
BIAS
OSCILLATOR
POP/CLICK
SUPPRESSION
GND
NOTES
1 INPUT CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE
VOLTAGE IS APPROXIMATELY VDD/2.
Figure 1.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.



Analog Devices SSM2301
SSM2301
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Pin Configurations and Function Descriptions ........................... 5
Typical Performance Characteristics ............................................. 6
REVISION HISTORY
10/07—Rev. 0 to Rev. A
Added MSOP Package .......................................................Universal
Changes to Features.......................................................................... 1
Changes to General Description .................................................... 1
Changes to Table 1............................................................................ 3
Deleted Evaluation Board Information Section ......................... 14
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 14
1/07—Revision 0: Initial Version
Typical Application Circuits ......................................................... 10
Applications Information .............................................................. 12
Overview ..................................................................................... 12
Gain Selection............................................................................. 12
Pop-and-Click Suppression ...................................................... 12
Layout .......................................................................................... 12
Input Capacitor Selection.......................................................... 12
Proper Power Supply Decoupling ............................................ 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
Rev. A | Page 2 of 16



Analog Devices SSM2301
SSM2301
SPECIFICATIONS
VDD = 5.0 V, TA = 25oC, RL = 8 Ω + 33 μH, unless otherwise noted.
Table 1.
Parameter
DEVICE CHARACTERISTICS
Output Power
Efficiency
Symbol Conditions
PO VDD = 5.0 V, RL = 8 Ω, THD = 1%
f = 1 kHz, 20 kHz BW
VDD = 5.0 V, RL = 8 Ω, THD = 10%
f = 1 kHz, 20 kHz BW
VDD = 3.6 V, RL = 8 Ω, THD = 1%
f = 1 kHz, 20 kHz BW
VDD = 3.6 V, RL = 8 Ω, THD = 10%
f = 1 kHz, 20 kHz BW
VDD = 2.5 V, RL = 8 Ω, THD = 1%
f = 1 kHz, 20 kHz BW
VDD = 2.5 V, RL = 8 Ω, THD = 10%
f = 1 kHz, 20 kHz BW
η POUT = 1.4 W, 8 Ω, VDD = 5.0 V
Min Typ Max
1.22
1.52
590
775
275
345
85
Unit
W
W
mW
mW
mW
mW
%
Total Harmonic Distortion + Noise
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
Average Switching Frequency
Differential Output Offset Voltage
POWER SUPPLY
Supply Voltage Range
Power Supply Rejection Ratio
Supply Current
Shutdown Current
GAIN CONTROL
Closed-Loop Gain
Differential Input Impedance
SHUTDOWN CONTROL
Input Voltage High
Input Voltage Low
Turn-On Time
Turn-Off Time
Output Impedance
NOISE PERFORMANCE
Output Voltage Noise
Signal-to-Noise Ratio
THD + N
VCM
CMRRGSM
fSW
VOOS
PO = 1 W into 8 Ω, f = 1 kHz, VDD = 5.0 V
PO = 0.5 W into 8 Ω, f = 1 kHz, VDD = 3.6 V
VCM = 2.5 V ± 100 mV at 217 Hz
G = 6 dB; G = 12 dB
1.0
VDD
PSRR
PSRRGSM
ISY
ISD
Guaranteed from PSRR test
VDD = 2.5 V to 5.0 V, dc input floating/ground
VRIPPLE = 100 mV at 217 Hz, inputs are ac grounded,
CIN = 0.01 μF, input referred
VIN = 0 V, no load, VDD = 5.0 V
VIN = 0 V, no load, VDD = 3.6 V
VIN = 0 V, no load, VDD = 2.5 V
SD = GND
2.5
70
AV0 GAIN pin = 0 V
AV1 GAIN pin = VDD
ZIN SD = VDD, SD = GND
VIH ISY ≥ 1 mA
VIL ISY ≤ 300 nA
tWU SD rising edge from GND to VDD
tSD SD falling edge from VDD to GND
ZOUT SD = GND
en VDD = 2.5 V to 5.0 V, f = 20 Hz to 20 kHz, inputs are
ac grounded, sine wave, AV = 6 dB, A weighting
SNR POUT = 1.4 W, RL = 8 Ω
0.1 %
0.04 %
VDD − 1.0 V
55 dB
1.8 MHz
2.0 mV
5.0
85
63
4.2
3.5
2.9
20
V
dB
dB
mA
mA
mA
nA
6 dB
12 dB
150 kΩ
210 kΩ
1.2
0.5
30
5
>100
V
V
ms
μs
35 μV
98 dB
Rev. A | Page 3 of 16







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