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ATmega128RFR2 Dataheets PDF



Part Number ATmega128RFR2
Manufacturers ATMEL
Logo ATMEL
Description 8-bit Microcontroller
Datasheet ATmega128RFR2 DatasheetATmega128RFR2 Datasheet (PDF)

ATmega256/128/64RFR2 Features • Network support by hardware assisted Multiple PAN Address Filtering • Advanced Hardware assisted Reduced Power Consumption • High Performance, Low Power AVR® 8-Bit Microcontroller • Advanced RISC Architecture - 135 Powerful Instructions – Most Single Clock Cycle Execution - 32x8 General Purpose Working Registers / On-Chip 2-cycle Multiplier - Up to 16 MIPS Throughput at 16 MHz and 1.8V – Fully Static Operation • Non-volatile Program and Data Memories - 256K/128K/.

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ATmega256/128/64RFR2 Features • Network support by hardware assisted Multiple PAN Address Filtering • Advanced Hardware assisted Reduced Power Consumption • High Performance, Low Power AVR® 8-Bit Microcontroller • Advanced RISC Architecture - 135 Powerful Instructions – Most Single Clock Cycle Execution - 32x8 General Purpose Working Registers / On-Chip 2-cycle Multiplier - Up to 16 MIPS Throughput at 16 MHz and 1.8V – Fully Static Operation • Non-volatile Program and Data Memories - 256K/128K/64K Bytes of In-System Self-Programmable Flash • Endurance: 10’000 Write/Erase Cycles @ 125°C (25’000 Cycles @ 85°C) - 8K/4K/2K Bytes EEPROM • Endurance: 20’000 Write/Erase Cycles @ 125°C (100’000 Cycles @ 25°C) - 32K/16K/8K Bytes Internal SRAM • JTAG (IEEE std. 1149.1 compliant) Interface - Boundary-scan Capabilities According to the JTAG Standard - Extensive On-chip Debug Support - Programming of Flash EEPROM, Fuses and Lock Bits through the JTAG interface • Peripheral Features - Multiple Timer/Counter & PWM channels - Real Time Counter with Separate Oscillator - 10-bit, 330 ks/s A/D Converter; Analog Comparator; On-chip Temperature Sensor - Master/Slave SPI Serial Interface - Two Programmable Serial USART - Byte Oriented 2-wire Serial Interface • Advanced Interrupt Handler and Power Save Modes • Watchdog Timer with Separate On-Chip Oscillator • Power-on Reset and Low Current Brown-Out Detector • Fully integrated Low Power Transceiver for 2.4 GHz ISM Band - High Power Amplifier support by TX spectrum side lobe suppression - Supported Data Rates: 250 kb/s and 500 kb/s, 1 Mb/s, 2 Mb/s - -100 dBm RX Sensitivity; TX Output Power up to 3.5 dBm - Hardware Assisted MAC (Auto-Acknowledge, Auto-Retry) - 32 Bit IEEE 802.15.4 Symbol Counter - SFD-Detection, Spreading; De-Spreading; Framing ; CRC-16 Computation - Antenna Diversity and TX/RX control / TX/RX 128 Byte Frame Buffer - Phase measurement support • PLL synthesizer with 5 MHz and 500 kHz channel spacing for 2.4 GHz ISM Band • Hardware Security (AES, True Random Generator) • Integrated Crystal Oscillators (32.768 kHz & 16 MHz, external crystal needed) • I/O and Package - 38 Programmable I/O Lines - 64-pad QFN (RoHS/Fully Green) • Temperature Range: -40°C to 125°C Industrial • Ultra Low Power consumption (1.8 to 3.6V) for AVR & Rx/Tx: 10.1mA/18.6 mA - CPU Active Mode (16MHz): 4.1 mA - 2.4GHz Transceiver: RX_ON 6.0 mA / TX 14.5 mA (maximum TX output power) - Deep Sleep Mode: <700nA @ 25°C • Speed Grade: 0 – 16 MHz @ 1.8 – 3.6V range with integrated voltage regulators 8-bit Microcontroller with Low Power 2.4GHz Transceiver for ZigBee and IEEE 802.15.4 ATmega256RFR2 ATmega128RFR2 ATmega64RFR2 Applications • ZigBee® / IEEE 802.15.4-2011/2006/2003™ – Full and Reduced Function Device • General Purpose 2.4GHz ISM Band Transceiver with Microcontroller • RF4CE, SP100, WirelessHART™, ISM Applications and IPv6 / 6LoWPAN 8393C-MCU Wireless-09/14 8393C-MCU Wireless-09/14 1 1 Pin Configurations Figure 1-1. Pinout ATmega256/128/64RFR2 [PF1:ADC1] [PF0:ADC0] [AREF] [AVSS] [AVDD] [EVDD] [AVSS:ASVSS] [XTAL1] [XTAL2] [DVSS] [DEVDD] [PE7:ICP3:INT7:CLKO] [PE6:T3:INT6] [PE5:OC3C:INT5] [PE4:OC3B:INT4] [PE3:OC3A:AIN1] 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 [PF2:ADC2:DIG2] 1 [PF3:ADC3:DIG4] 2 [PF4:ADC4:TCK] 3 [PF5:ADC5:TMS] 4 [PF6:ADC6:TDO] 5 [PF7:ADC7:TDI] 6 [AVSS_RFP] 7 [RFP] 8 [RFN] 9 [AVSS_RFN] 10 [TST] 11 [RSTN] 12 [RSTON] 13 [PG0:DIG3] 14 [PG1:DIG1] 15 [PG2:AMR] 16 Index corner ATmega256/128/64RFR2 Exposed paddle: [AVSS] 48 [PE2:XCK0:AIN0] 47 [PE1:TXD0] 46 [PE0:RXD0:PCINT8] 45 [DVSS] 44 [DEVDD] 43 [PB7:OC0A:OC1C:PCINT7] 42 [PB6:OC1B:PCINT6] 41 [PB5:OC1A:PCINT5] 40 [PB4:OC2A:PCINT4] 39 [PB3:MISO:PDO:PCINT3] 38 [PB2:MOSI:PDI:PCINT2] 37 [PB1:SCK:PCINT1] 36 [PB0:SSN:PCINT0] 35 [DVSS] 34 [DEVDD] 33 [CLKI] 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 00 [PG3:TOSC2] [PG4:TOSC1] [PG5:OC0B] [DVSS:DSVSS] [DVDD] [DVDD] [DEVDD] [DVSS] [PD0:SCL:INT0] [PD1:SDA:INT1] [PD2:RXD1:INT2] [PD3:TXD1:INT3] [PD4:ICP1] [PD5:XCK1] [PD6:T1] [PD7:T0] Note: The large center pad underneath the QFN/MLF package is made of metal and internally connected to AVSS. It should be soldered or glued to the board to ensure good mechanical stability. If the center pad is left unconnected, the package might loosen from the board. It is not recommended to use the exposed paddle as a replacement of the regular AVSS pins. 2 Disclaimer Typical values contained in this datasheet are based on simulation and characterization results of other AVR microcontrollers and radio transceivers manufactured in a similar process technology. Minimum and Maximum values will be available after the device is characterized. 2 ATmega256/128/64RFR2 8393C-MCU Wireless-09/14 ATmega256/128/64RFR2 3 Overview 3.1 Block Diagram The ATmega256/128/64RFR2 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture combined with a high data rate transceiver for the 2.4 GHz ISM band. By executing powerful ins.


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