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AT86RF231-ZF Dataheets PDF



Part Number AT86RF231-ZF
Manufacturers ATMEL
Logo ATMEL
Description Low Power 2.4GHz Transceiver
Datasheet AT86RF231-ZF DatasheetAT86RF231-ZF Datasheet (PDF)

Features • High Performance RF-CMOS 2.4 GHz Radio Transceiver Targeted for IEEE 802.15.4™, ZigBee®, 6LoWPAN, RF4CE, SP100, WirelessHART™ and ISM Applications • Industry Leading Link Budget (104 dB) – Receiver Sensitivity -101 dBm – Programmable Output Power from -17 dBm up to +3 dBm • Ultra-Low Current Consumption: – SLEEP = 0.02 µA – TRX_OFF = 0.4 mA – RX_ON = 12.3 mA – BUSY_TX = 14 mA (at max. Transmit Power of +3 dBm) • Ultra-Low Supply Voltage (1.8V to 3.6V) with Internal Regul.

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Features • High Performance RF-CMOS 2.4 GHz Radio Transceiver Targeted for IEEE 802.15.4™, ZigBee®, 6LoWPAN, RF4CE, SP100, WirelessHART™ and ISM Applications • Industry Leading Link Budget (104 dB) – Receiver Sensitivity -101 dBm – Programmable Output Power from -17 dBm up to +3 dBm • Ultra-Low Current Consumption: – SLEEP = 0.02 µA – TRX_OFF = 0.4 mA – RX_ON = 12.3 mA – BUSY_TX = 14 mA (at max. Transmit Power of +3 dBm) • Ultra-Low Supply Voltage (1.8V to 3.6V) with Internal Regulator • Optimized for Low BoM Cost and Ease of Production: – Few External Components Necessary (Crystal, Capacitors and Antenna) – Excellent ESD Robustness • Easy to Use Interface: – Registers, Frame Buffer and AES Accessible through Fast SPI – Only Two Microcontroller GPIO Lines Necessary – One Interrupt Pin from Radio Transceiver – Clock Output with Prescaler from Radio Transceiver • Radio Transceiver Features: – 128-byte FIFO (SRAM) for Data Buffering – Programmable Clock Output, to Clock the Host Microcontroller or as Timer Reference – Integrated RX/TX Switch – Fully Integrated, Fast Settling PLL to support Frequency Hopping – Battery Monitor – Fast Wake-Up Time < 0.4 msec • Special IEEE 802.15.4-2006 Hardware Support: – FCS Computation and Clear Channel Assessment – RSSI Measurement, Energy Detection and Link Quality Indication • MAC Hardware Accelerator: – Automated Acknowledgement, CSMA-CA and Retransmission – Automatic Address Filtering – Automated FCS Check • Extended Feature Set Hardware Support: – AES 128-bit Hardware Accelerator – RX/TX Indication (external RF Front-End Control) – RX Antenna Diversity – Supported PSDU data rates: 250 kb/s, 500 kb/s, 1 Mb/s and 2 Mb/s – True Random Number Generation for Security Application • Industrial and Extended Temperature Range: – -40°C to +85°C and -40°C to +125°C • I/O and Packages: – 32-pin Low-Profile QFN Package 5 x 5 x 0.9 mm³ – RoHS/Fully Green • Compliant to IEEE 802.15.4-2006 and IEEE 802.15.4-2003 • Compliant to EN 300 328/440, FCC-CFR-47 Part 15, ARIB STD-T66, RSS-210 Low Power 2.4 GHz Transceiver for ZigBee, IEEE 802.15.4, 6LoWPAN, RF4CE, SP100, WirelessHART, and ISM Applications AT86RF231-ZU AT86RF231-ZF 8111C–MCU Wireless–09/09 AT86RF231 1. Pin-out Diagram Figure 1-1. AT86RF231 Pin-out Diagram AVSS AVSS AVSS AVDD EVDD AVSS XTAL1 XTAL2 D IG3 D IG4 AVSS R FP R FN AVSS DVSS /R ST 32 31 30 29 28 27 26 25 1 exposed paddle 24 2 AVSS 23 3 22 4 A T86 R F2 3 1 21 5 20 6 19 7 18 8 17 9 10 11 12 13 14 15 16 IR Q /SEL MOSI DVSS M ISO SCLK DVSS CLKM DIG1 DIG2 SLP_TR DVSS DV D D DV D D DE V D D DVSS Note: The exposed paddle is electrically connected to the die inside the package. It shall be soldered to the board to ensure electrical and thermal contact and good mechanical stability. 8111C–MCU Wireless–09/09 2 AT86RF231 1.1 Pin Descriptions Table 1-1. Pin Description AT86RF231 Pins Name Type 1 DIG3 Digital output (Ground) 2 DIG4 Digital output (Ground) 3 AVSS Ground 4 RFP RF I/O 5 RFN RF I/O 6 AVSS Ground 7 DVSS Ground 8 /RST Digital input 9 DIG1 Digital output (Ground) 10 DIG2 Digital output (Ground) 11 SLP_TR Digital input 12 DVSS Ground 13 DVDD Supply 14 DVDD Supply 15 DEVDD Supply 16 DVSS Ground 17 CLKM Digital output 18 DVSS Ground 19 SCLK Digital input 20 MISO Digital output 21 DVSS Ground 22 MOSI Digital input 23 /SEL Digital input 24 IRQ Digital output 25 XTAL2 Analog input 26 XTAL1 Analog input 27 AVSS Ground 28 EVDD Supply Description 1. RX/TX Indicator, see Section 11.5 2. If disabled, pull-down enabled (AVSS) 1. RX/TX indicator (DIG3 inverted), see Section 11.5 2. If disabled, pull-down enabled (AVSS) Ground for RF signals Differential RF signal Differential RF signal Ground for RF signals Digital ground Chip reset; active low 1. Antenna Diversity RF switch control, see Section 11.4 2. If disabled, pull-down enabled (DVSS) 1. Antenna Diversity RF switch control (DIG1 inverted), see Section 11.4 2. Signal IRQ_2 (RX_START) for RX Frame Time Stamping, see Section 11.6 3. If functions disabled, pull-down enabled (DVSS) Controls sleep, transmit start, receive states; active high, see Section 6.5 Digital ground Regulated 1.8V voltage regulator; digital domain, see Section 9.4 Regulated 1.8V voltage regulator; digital domain, see Section 9.4 External supply voltage; digital domain Digital ground Master clock signal output; low if disabled, see Section 9.6 Digital ground SPI clock SPI data output (Master Input Slave Output) Digital ground SPI data input (Master Output Slave Input) SPI select, active low 1. Interrupt request signal; active high or active low; configurable 2. Frame Buffer Empty Indicator; active high, see Section 11.7 Crystal pin, see Section 9.6 Crystal pin or external clock supply, see Section 9.6 Analog ground External supply voltage, analog domain 8111C–MCU Wireless–09/09 3 AT86RF231 Table 1-1. Pin Description AT86RF231 (Continued) Pins Name Type Description .


AT86RF231-ZU AT86RF231-ZF TT2071


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