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WT7502V Dataheets PDF



Part Number WT7502V
Manufacturers Weltrend Semiconductor
Logo Weltrend Semiconductor
Description PC POWER SUPPLY SUPERVISOR
Datasheet WT7502V DatasheetWT7502V Datasheet (PDF)

Weltrend Semiconductor, Inc. ` WT7502V PC POWER SUPPLY SUPERVISOR Data Sheet REV. 1.01 November 30, 2010 The information in this document is subject to change without notice. ©Weltrend Semiconductor, Inc. All Rights Reserved. 242 2F, No. 24, Industry E. 9th RD., Science-Based Industrial Park, Hsin-Chu, Taiwan TEL:886-3-5780241 FAX:886-3-5794278.5770419 WT7502V Rev. 1.01 GENERAL DESCRIPTION The WT7502V provides protection circuits, power good output (PGO), fault protection latch (FPOB), and a p.

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Weltrend Semiconductor, Inc. ` WT7502V PC POWER SUPPLY SUPERVISOR Data Sheet REV. 1.01 November 30, 2010 The information in this document is subject to change without notice. ©Weltrend Semiconductor, Inc. All Rights Reserved. 242 2F, No. 24, Industry E. 9th RD., Science-Based Industrial Park, Hsin-Chu, Taiwan TEL:886-3-5780241 FAX:886-3-5794278.5770419 WT7502V Rev. 1.01 GENERAL DESCRIPTION The WT7502V provides protection circuits, power good output (PGO), fault protection latch (FPOB), and a protection detector function (PSONB) control. It can minimize external components of switching power supply systems in personal computer. The Over Voltage Detector (OVD) monitors V33, V5 and VCC input voltage level. The Under Voltage Detector (UVD) monitors V33, V5 and VCC input voltage level. When OVD or UVD detect the fault voltage level, the FPOB is latched HIGH and PGO go low. When PGI detect the fault voltage level, the FPOB would be kept LOW and PGO go low. The latch can be reset by PSONB go HIGH. There is 2.4 ms delay time for PSONB turn off FPOB. When PGI and OVD and UVD detect the right voltage level, the power good output (PGO) will be issue. FEATURES • The Over Voltage Detector (OVD) monitors V33, V5 and VCC input voltage. • The Under Voltage Detector (UVD) monitors V33, V5 and VCC input voltage. • Both of the power good output (PGO) and fault protection latch (FPOB) are Open Drain Output. • 75 ms time delay for UVD. • 300 ms time delay for PGO. • 38 ms for PSONB input signal De–bounce. • 73 us for PGI and UVD internal signal De–glitches. • 55 us for OVD internal signal De–glitches. • 2.4 ms time delay for PSONB turn-off FPOB. • The UVD would been disabled when PGI < 0.95V. PIN ASSIGNMENT AND PACKAGE TYPE ORDERING INFORMATION PACKAGE 8–Pin Plastic DIP Green WT7502V–NG084 8–Pin Plastic SOP WT7502V–SG084 Weltrend Semiconductor, Inc. Page 2 PIN DESCRIPTION Pin Name TYPE PGI I GND P FPOB O PSONB I V33 I V5 I VCC I PGO O Description Power good input signal pin Ground Fault protection output pin, open drain output On/Off switch input 3.3V over voltage & under voltage 5V over voltage & under voltage Power supply Power good output signal pin, open drain output WT7502V Rev. 1.01 FUNCTION TABLE PGI < 0.95V < 0.95V < 0.95V 0.95V < PGI < 1.2V 0.95V < PGI < 1.2V 0.95V < PGI < 1.2V PGI > 1.2 PGI > 1.2 PGI > 1.2 X X = don’t care PSONB L L L L L L L L L H UVD No No Yes No No Yes No No Yes X OVD No Yes No No Yes No No Yes No X FPOB L H L L H H L H H H PGO L L L L L L H L L L Weltrend Semiconductor, Inc. Page 3 BLOCK DIAGRAM WT7502V Rev. 1.01 Weltrend Semiconductor, Inc. Page 4 WT7502V Rev. 1.01 ABSOLUTE MAXIMUM RATINGS Parameter Min. Max. Supply voltage, VCC –0.3 16 Input voltage PGI, PSONB, V5, V33 –0.3 VCC + 0.3(Max. 7V) Output voltage PGO FPOB –0.3 VCC + 0.3(Max. 7V) –0.3 VCC + 0.3 Operating temperature -20 85 Storage temperature -55 150 *Note: Stresses above those listed may cause permanent damage to the .


Si7804DN WT7502V 2SB1008


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