PH5330E

PH5330E N-channel TrenchMOS logic level FET Rev. 02 — 19 October 2009 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only. 1.2 Features and benefits „ Higher operating power due to low thermal resistance „ Low conduction losses due to low on-state resistance „ Suitable for logic level gate drive sources 1.3 Applications „ DC-to-DC convertors „ Notebook computers „ Portable equipment „ Switched-mode power supplies 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C ID drain current Tmb = 25 °C; VGS = 10 V; see Figure 1 and 3 Ptot total power dissipation Tmb = 25 °C; see Figure 2 Dynamic characteristics QGD gate-drain charge VGS = 5 V; ID = 20 A; VDS = 10 V; Tj = 25 °C; see Figure 11 Static characteristics RDSon drain-source VGS = 10 V; ID = 15 A; on-state resistance Tj = 25 °C; see Figure 9 and 10 Min Typ Max Unit - - 30 V - - 80 A - - 62.5 W - 6 - nC - 4.8 5.7 mΩ NXP Semiconductors PH5330E N-channel TrenchMOS logic level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description 1S source 2S source 3S source 4G gate mb D mounting base; connected to drain 3. Ordering information Simplified outline m...