DatasheetsPDF.com

FS7140 Dataheets PDF



Part Number FS7140
Manufacturers ON Semiconductor
Logo ON Semiconductor
Description Programmable PhaseLocked Loop Clock Generator
Datasheet FS7140 DatasheetFS7140 Datasheet (PDF)

FS7140, FS7145 Programmable Phase- Locked Loop Clock Generator Description The FS7140 or FS7145 is a monolithic CMOS clock generator/ regenerator IC designed to minimize cost and component count in a variety of electronic systems. Via the I2C−bus interface, the FS7140/45 can be adapted to many clock generation requirements. The length of the reference and feedback dividers, their fine granularity and the flexibility of the post divider make the FS7140/45 the most flexible stand−alone PLL clock .

  FS7140   FS7140


Document
FS7140, FS7145 Programmable Phase- Locked Loop Clock Generator Description The FS7140 or FS7145 is a monolithic CMOS clock generator/ regenerator IC designed to minimize cost and component count in a variety of electronic systems. Via the I2C−bus interface, the FS7140/45 can be adapted to many clock generation requirements. The length of the reference and feedback dividers, their fine granularity and the flexibility of the post divider make the FS7140/45 the most flexible stand−alone PLL clock generator available. Features • Extremely Flexible and Low−jitter Phase Locked Loop (PLL) Frequency Synthesis • No External Loop Filter Components Needed • 150 MHz CMOS or 340 MHz PECL Outputs • Completely Configurable via I2C−bus • Up to Four FS714x can be Used on a Single I2C−bus • 3.3 V Operation • Independent On−chip Crystal Oscillator and External Reference Input • Very Low “Cumulative” Jitter • Pb−Free Packages are Available Applications • Precision Frequency Synthesis • Low−frequency Clock Multiplication • Video Line−locked Clock Generation • Laser Beam Printers (FS7145) http://onsemi.com SOIC−16 01 SUFFIX CASE 751BA SSOP−16 02 SUFFIX CASE 565AE PIN CONNECTIONS 1 SCL CLKN SDA ADDR0 VSS XIN XOUT ADDR1 CLKP VDD * REF VSS N/C VDD IPRG (Top View) * FS7140 pin 13 = N/C * FS7145 pin 13 = SYNC ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 17 of this data sheet. © Semiconductor Components Industries, LLC, 2011 October, 2011 − Rev. 7 1 Publication Order Number: FS7140/D FS7140, FS7145 Figure 1. Device Block Diagram Table 1. PIN DESCRIPTIONS* Pin Type Name Description 1 DI SCL Serial interface clock (requires an external pull−up) 2 DIO SDA Serial interface data input/output (requires an external pull−up) 3 DID ADDR0 Address select bit “0” 4 P VSS Ground 5 AI XIN Crystal oscillator feedback 6 AO XOUT Crystal oscillator drive 7 DID ADDR1 Address select bit “1” 8 P VDD Power supply (+3.3 V nominal) 9 AI IPRG PECL current drive programming 10 − n/c No connection 11 P VSS Ground 12 DIU REF Reference frequency input 13 − n/c FS7140 = No connection DIU SYNC FS7145 = Synchronization input 14 P VDD Power supply (+3.3 V nominal) 15 DO CLKP Clock output 16 DO CLKN Inverted clock output *Key: AI: Analog Input; AO = Analog Output; DI = Digital Input; DIU = Input with Internal Pull−up; DID = Input with Internal Pull−down; DIO = Digital Input/Output; DI−3 = Three−Level Digital Input; DO = Digital Output; P = Power/Ground; # = Active Low Pin http://onsemi.com 2 FS7140, FS7145 ELECTRICAL SPECIFICATIONS Table 2. ABSOLUTE MAXIMUM RATINGS Symbol Parameter Min Typ Max Units VDD Supply voltage, dc (VSS = ground) V1 Input voltage, dc VO Output voltage, dc IIK Input clamp current, dc (VI < 0 or VI > VDD) IOK Output clamp current, dc (VI < 0 or VI > VDD) TS Storage temperature range (non−condensing) TA Ambient temperature range, under bias TJ Junction temperature Re−flow solder profile VSS − 0.5 VSS − 0.5 VSS − 0.5 −50 4.5 VDD + 0.5 VDD + 0.5 50 −50 50 −65 150 −55 125 150 Per IPC/JEDEC J−STD−020B V V V mA mA °C °C °C Input static discharge voltage protection (MIL−STD 883E, Method 3015.7) 2 kV Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. WARNING: ELECTROSTATIC SENSITIVE DEVICE Permanent damage resulting in a loss of functionality or performance may occur if this device is subjected to a high-energy electrostatic discharge. Table 3. OPERATING CONDITIONS Symbol Parameter VDD Supply voltage TA Ambient operating temperature range Min Typ Max Units 3.0 3.3 3.6 V 0 70 °C http://onsemi.com 3 FS7140, FS7145 Table 4. DC ELECTRICAL SPECIFICATIONS (Note 1) Parameter Symbol Conditions/Description Min Typ Max Units OVERALL Supply current, dynamic IDD CMOS mode; FXTAL = 15 MHz; FVCO = 400 MHz; FCLK = 200 MHz; does not include load current 35 mA Supply current, static IDDL SERIAL COMMUNICATION I/O (SDA, SCL) SHUT1, SHUT2 bit both “1” 400 700 mA High−level input voltage Low−level input voltage Hysteresis voltage Input leakage current Low−level output sink current (SDA) VIH VIL Vhys II IOL ADDRESS SELECT INPUT (ADDR0, ADDR1) SDA, SCL in read condition SDA in acknowledge condition; VSDA = 0.4 V 0.8*VDD −10 5 0.33*VDD 14 0.2*VDD +10 V V V mA mA High−level input voltage VIH Low−level input voltage VIL High−level input current (pull−down) IIH Low−level input current IIL REFERENCE FREQUENCY INPUT (REF) VADDRx = VDD VADDRx = 0 V VDD−1.0 30 −1 V 0.8 V mA 1 mA High−level input voltage VIH Low−level input voltage VIL High−level input current IIH VREF = VDD Low−level input current (pull−down) IIL VREF = 0 V SYNC CONTROL INPUT (SYNC) VDD−1.0 V 0.8 .


FH102A FS7140 FS7145


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)