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UPA2719AGR

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P-CHANNEL POWER MOS FET

DATA SHEET MOS FIELD EFFECT TRANSISTOR μ PA2719AGR SWITCHING P-CHANNEL POWER MOS FET DESCRIPTION The μ PA2719AGR is P-C...


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UPA2719AGR

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Description
DATA SHEET MOS FIELD EFFECT TRANSISTOR μ PA2719AGR SWITCHING P-CHANNEL POWER MOS FET DESCRIPTION The μ PA2719AGR is P-Channel MOS Field Effect Transistor designed for power management applications of notebook computers and Lithium-Ion battery protection circuit. PACKAGE DRAWING (Unit: mm) 85 1, 2, 3 : Source 4 : Gate 5, 6, 7, 8 : Drain FEATURES Low on-state resistance RDS(on)1 = 13 mΩ MAX. (VGS = −10 V, ID = −5.0 A) RDS(on)2 = 20.9 mΩ MAX. (VGS = −4.5 V, ID = −5.0 A) Low input capacitance Ciss = 2010 pF TYP. Built-in gate protection diode Small and surface mount package (Power SOP8) 1.8 MAX. 1.44 0.05 MIN. 14 5.37 MAX. 6.0 ±0.3 4.4 +0.10 –0.05 0.15 1.27 0.78 MAX. 0.40 +0.10 –0.05 0.12 M 0.5 ±0.2 0.8 0.10 ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) VDSS −30 V Gate to Source Voltage (VDS = 0 V) VGSS m20 V Drain Current (DC) Drain Current (pulse) Note1 Total Power Dissipation Note2 Total Power Dissipation Note3 ID(DC) ID(pulse) PT1 PT2 m10 m100 2 2 A A W W Channel Temperature Tch 150 °C Storage Temperature Single Avalanche Current Note4 Single Avalanche Energy Note4 Tstg −55 to +150 °C IAS −10 A EAS 10 mJ EQUIVALENT CIRCUIT Drain Gate Body Diode Gate Protection Diode Source Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1% 2. Mounted on ceramic substrate of 1200 mm2 x 2.2 mm 3. Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm, PW = 10 sec 4. Starting Tch = 25°C, VDD = −15 V...




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