Quad 2-Input AND Gate
74HC08
Quad 2−Input AND Gate
High−Performance Silicon−Gate CMOS
The 74HC08 is identical in pinout to the LS08. The devi...
Description
74HC08
Quad 2−Input AND Gate
High−Performance Silicon−Gate CMOS
The 74HC08 is identical in pinout to the LS08. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
Features
Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 mA High Noise Immunity Characteristic of CMOS Devices In Compliance With the JEDEC Standard No. 7A Requirements ESD Performance: HBM > 2000 V; Machine Model > 200 V Chip Complexity: 24 FETs or 6 Equivalent Gates These are Pb−Free Devices
1 A1 B1 2
4 A2 B2 5
9 A3 B3 10
12 A4 B4 13
LOGIC DIAGRAM PIN 14 = VCC PIN 7 = GND
3 Y1
6 Y2 Y = AB
8 Y3
11 Y4
Pinout: 14−Lead Packages (Top View) VCC B4 A4 Y4 B3 A3 Y3 14 13 12 11 10 9 8
14 1
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MARKING DIAGRAMS
14 SOIC−14 D SUFFIX CASE 751A
1
HC08G AWLYWW
14 1
TSSOP−14 DT SUFFIX CASE 948G
14
HC 08 ALYW G G 1
HC08 = Device Code A = Assembly Location WL or L = Wafer Lot Y = Year WW or W = Work Week G or G = Pb−Free Package
(Note: Microdot may be in either location)
FUNCTION TABLE
Inputs
Output
AB
Y
LL LH HL HH
L L L H
1234567 A1 B1 Y1 A2 B2 Y2 GND
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2007
March, 2007 − Rev. 1
1
Publication Order Number: 74HC08/D
74HC08
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