AX8052F100

AX8052F100 Ultra-Low Power Microcontroller OVERVIEW The AX8052F100 is a single chip ultra−lowpower microcontroller primarily for use in radio applications. The AX8052F100 contains a high speed microcontroller compatible to the industry standard 8052 instruction set. It contains 64 kBytes of FLASH and 8.25 kBytes of internal SRAM. The AX8052F100 features 3 16−bit general purpose timers with SD capability, 2 output compare units for generating PWM signals, 2 input compare units to record timings of external signals, 2 16−bit wakeup timers, a watchdog timer, 2 UARTs, a Master/Slave SPI controller, a 10−bit 500 kSample/s A/D converter, 2 analog comparators, a temperature sensor, a 2 channel DMA controller, and a dedicated AES crypto controller. Debugging is aided by a dedicated hardware debug interface controller that connects using a 3−wire protocol (1 dedicated wire, 2 shared with GPIO) to the PC hosting the debug software. www.onsemi.com 1 28 QFN28 5x5, 0.5P CASE 485EH ORDERING INFORMATION Device Package Shipping† AX8052F100−2−TA05 AX8052F100−3−TA05 QFN28 500 / (Pb−Free) Tape & Reel Features Ultra−low Power Microcontroller QFN28 Package Supply Range 1.8 V − 3.6 V −40°C to 85°C Ultra−low Power Consumption: ♦ CPU Active Mode 150 mA/MHz ♦ Sleep Mode with 256 Byte RAM Retention and Wake−up Timer running 850 nA ♦ Sleep Mode 4 kByte RAM Retention and Wake−up Timer running 1.5 mA ♦ Sleep Mode 8 kByte RAM Retention and Wake−up Timer running 2.2 mA AX8052 Core Ind...