ASM3P622S00E

ASM3P622S00B, ASM3P622S00E Product Preview Low Frequency TIMING SAFEt Peak EMI Reduction IC Description ASM3P622S00B/E is a versatile, 3.3 V Zero−delay buffer designed to distribute low frequency Timing−Safe clocks with Peak EMI reduction. ASM3P622S00B is an eight−pin version, accepts one reference input and drives out one low−skew Timing−Safe clock. ASM3P622S00E accepts one reference input and drives out eight low−skew Timing−Safe clocks. ASM3P622S00B/E has an SS% that selects 2 different Deviation and associated Input−Output Skew (TSKEW). Refer to Spread Spectrum Control and Input−Output Skew table for details. ASM3P622S00E has a CLKOUT for adjusting the Input−Output clock delay, depending upon the value of capacitor connected at this pin to GND. ASM3P622S00B/E operates from a 3.3 V supply and is available in two different packages, as shown in the ordering information table, over commercial and Industrial temperature range. Application ASM3P622S00B/E is targeted for use in Displays and memory interface systems. Features Low Frequency Clock Distribution with Timing−Safe Peak EMI Reduction Input Frequency Range: 4 MHz − 20 MHz 2 Different Spread Selection Options Spread Spectrum can be Turned ON/OFF External Input−Output Delay Control Option Supply Voltage: 3.3 V ± 0.3 V Commercial and Industrial Temperature Range Packaging Information: ASM3P622S00B: 8 pin SOIC, and TSSOP ASM3P622S00E: 16 pin SOIC, and TSSOP The First True Drop−in Solution These Devices ...