HXB15H1G800CF

July 2014 HXB15H1G800CF HXB15H1G160CF 1-Gbit Double-Date-Rate-Three SDRAM DDR3 SDRAM EU RoHS HF Compliant Products Data Sheet Rev. 1 Revision History: Rev. 1, 2014-07 Initial version Data Sheet HXB15H1G(80/16)0CF 1-Gbit Double-Data-Rate-Three SDRAM We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] SCS_techdoc_A4, 2014-07 2 Data Sheet 1 Overview HXB15H1G(80/16)0CF 1-Gbit Double-Data-Rate-Three SDRAM This chapter gives an overview of the 1-Gbit Double-Data-Rate-Three SDRAM product family and describes its main characteristics. 1.1 Features The 1-Gbit Double-Data-Rate-Three SDRAM offers the following key features: 1.5 V ±0.075 V Power Supply Off-Chip-Driver impedance adjustment (OCD) and 1.5 V ±0.075 V (SSTL_15) compatible I/O DRAM organizations with 8/16 data in/outputs Double Data Rate architecture: – two data transfers per clock cycle – eight internal banks for concurrent operation Programmable CAS Latency: 6, 7, 8, 9, 10, 11, 12, 13 and 14 supported Programmable Burst Length: 4/8 with both nibble sequential and interleave mode. Differential clock inputs (CK and CK) Bi-directional, differential data strobes (DQS and DQS) are transmitted / received with data. Edge aligned with read On-Die-Termination (ODT) for bett...