F50L512M41A

ESMT Flash PRODUCT LIST Parameters VCC VCCQ1 Width Frequency Internal ECC Correction Transfer Rate Loading Throughput Power-up Ready Time Max Reset Busy Time Note: 1. VCCQ should be the same as VCC. 2. x2 PROGRAM operation is not defined. F50L512M41A 3.3V 512 Mbit SPI-NAND Flash Memory Values 3.3V 3.3V x1, x22, x4 104MHz 1-bit 10ns 104MT/s 1ms (maximum value) 1ms (maximum value) FEATURES z Voltage Supply: 3.3V (2.7V~3.6V) z Organization - Memory Cell Array: (64M + 2M) x 8bit - Data Register: (2K + 64) x 8bit z Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte z Page Read Operation - Page Size: (2K + 64) Byte - Read from Cell to Register with Internal ECC: 100us z Memory Cell: 1bit/Memory Cell z Support SPI-Mode 0 and SPI-Mode 31 z Fast Write Cycle Time - Program time:400us - Block Erase time: 4ms z Hardware Data Protection - Program/Erase Lockout During Power Transitions z Reliable CMOS Floating Gate Technology - Internal ECC Requirement: 1bit/512Byte - Endurance: 100K Program/Erase cycles - Data Retention: 10 years z Command Register Operation z NOP: 4 cycles z OTP Operation z Bad-Block-Protect Note: 1. Mode 0: CPOL = 0, CPHA = 1; Mode 3: CPOL = 1, CPHA = 1 ORDERING INFORMATION Product ID Speed F50L512M41A -104RAG 104MHz Package 8-contact LGA 8x6mm Comments Pb-free Elite Semiconductor Memory Technology Inc. Publication Date: May 2014 Revision: 1.1 1/36 ESMT F50L512M41A GENERAL DESCRIPTION The serial electrical int...